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74LVC8T245-Q100; 74LVCH8T245-Q100

8-bit dual supply translating transceiver; 3-state

The 74LVC8T245-Q100; 74LVCH8T245-Q100 are 8-bit dual supply translating transceivers with 3-state outputs that enable bidirectional level translation. They feature two data input-output ports (pins An and Bn), a direction control input (DIR), an output enable input (OE) and dual supply pins (VCC(A) and VCC(B)). Both VCC(A) and VCC(B) can be supplied at any voltage between 1.2 V and 5.5 V. This flexibility makes the device suitable for translating between any of the low voltage nodes (1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V and 5.0 V). Pins An, OE and DIR are referenced to VCC(A) and pins Bn are referenced to VCC(B). A HIGH on DIR allows transmission from An to Bn and a LOW on DIR allows transmission from Bn to An. The output enable input (OE) can be used to disable the outputs so the buses are effectively isolated.

The devices are fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing any damaging backflow current through the device when it is powered down. In suspend mode when either VCC(A) or VCC(B) are at GND level, both A port and B port are in the high-impedance OFF-state.

Active bus hold circuitry in the 74LVCH8T245-Q100 holds unused or floating data inputs at a valid logic level.

This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.

特性

  • Automotive product qualification in accordance with AEC-Q100 (Grade 1)

    • Specified from -40 °C to +85 °C and from -40 °C to +125 °C

  • Wide supply voltage range:

    • VCC(A): 1.2 V to 5.5 V

    • VCC(B): 1.2 V to 5.5 V

  • High noise immunity

  • Complies with JEDEC standards:

    • JESD8-7 (1.2 V to 1.95 V)

    • JESD8-5 (1.8 V to 2.7 V)

    • JESD8C (2.7 V to 3.6 V)

    • JESD36 (4.5 V to 5.5 V)

  • Maximum data rates:

    • 420 Mbps (3.3 V to 5.0 V translation)

    • 210 Mbps (translate to 3.3 V))

    • 140 Mbps (translate to 2.5 V)

    • 75 Mbps (translate to 1.8 V)

    • 60 Mbps (translate to 1.5 V)

  • Suspend mode

  • Latch-up performance exceeds 100 mA per JESD 78B Class II

  • ±24 mA output drive (VCC = 3.0 V)

  • Inputs accept voltages up to 5.5 V

  • Low power consumption: 30 μA maximum ICC

  • IOFF circuitry provides partial Power-down mode operation

  • ESD protection:

    • HBM: ANSI/ESDA/JEDEC JS-001 class 3A exceeds 4000 V

    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

  • DHVQFN package with Side-Wettable Flanks enabling Automatic Optical Inspection (AOI) of solder joints

参数类型

Type numberProduct statusVCC(A) (V)VCC(B) (V)Logic switching levelsOutput drive capability (mA)tpd (ns)Nr of bitsPower dissipation considerationsTamb (°C)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package name
74LVC8T245BQ-Q100Production1.2 - 5.51.2 - 5.5CMOS/LVTTL± 243.58low-40~125665.840DHVQFN24
74LVC8T245PW-Q100Production1.2 - 5.51.2 - 5.5CMOS/LVTTL± 243.58low-40~125812.336TSSOP24
74LVCH8T245BQ-Q100Production1.2 - 5.51.2 - 5.5CMOS/LVTTL± 243.58low-40~125665.840DHVQFN24
74LVCH8T245PW-Q100Production1.2 - 5.51.2 - 5.5CMOS/LVTTL± 243.58low-40~125812.336TSSOP24

封装

型号封装尺寸版本回流焊/波峰焊包装状态标示可订购的器件编号,(订购码(12NC))
74LVC8T245BQ-Q100
DHVQFN24
(SOT815-1)
SOT815-1SOT815-1_118ActiveLVC8T24574LVC8T245BQ-Q100J
( 9353 011 04118 )
74LVC8T245PW-Q100
TSSOP24
(SOT355-1)
SOT355-1SSOP-TSSOP-VSO-WAVE
SOT355-1_118ActiveLVC8T24574LVC8T245PW-Q100J
( 9353 004 65118 )
74LVCH8T245BQ-Q100
DHVQFN24
(SOT815-1)
SOT815-1SOT815-1_118ActiveVCH8T24574LVCH8T245BQ-Q10J
( 9353 011 03118 )
74LVCH8T245PW-Q100
TSSOP24
(SOT355-1)
SOT355-1SSOP-TSSOP-VSO-WAVE
SOT355-1_118ActiveLVCH8T24574LVCH8T245PW-Q10J
( 9353 011 02118 )

环境信息

型号可订购的器件编号化学成分RoHSRHF指示符无铅转换日期
74LVC8T245BQ-Q10074LVC8T245BQ-Q100J74LVC8T245BQ-Q100Always Pb-free
74LVC8T245PW-Q10074LVC8T245PW-Q100J74LVC8T245PW-Q100Always Pb-free
74LVCH8T245BQ-Q10074LVCH8T245BQ-Q10J74LVCH8T245BQ-Q100Always Pb-free
74LVCH8T245PW-Q10074LVCH8T245PW-Q10J74LVCH8T245PW-Q100Always Pb-free
品质及可靠性免责声明

文档 (6)

文件名称标题类型日期
74LVC_LVCH8T245_Q1008-bit dual supply translating transceiver; 3-stateData sheet2023-08-10
lvc8t24574LVC8T245 IBIS modelIBIS model2021-02-02
lvch8t24574LVCH8T245 IBIS modelIBIS model2020-11-24
SSOP-TSSOP-VSO-WAVEFootprint for wave solderingWave soldering2009-10-08
SOT355-1plastic, thin shrink small outline package; 24 leads; 0.65 mm pitch; 7.8 mm x 4.4 mm x 1.1 mm bodyPackage information2022-06-22
SOT815-1plastic, leadless dual in-line compatible thermal enhanced very thin quad flat package; 24 terminals; 0.5 mm pitch; 5.5 mm x 3.5 mm x 1 mm bodyPackage information2021-08-17

支持

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模型

文件名称标题类型日期
lvc8t24574LVC8T245 IBIS modelIBIS model2021-02-02
lvch8t24574LVCH8T245 IBIS modelIBIS model2020-11-24

样品

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