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74LVC16373A; 74LVCH16373A

16-bit D-type transparent latch with 5 V tolerant inputs/outputs; 3-state

The 74LVC16373A and 74LVCH16373A are 16-bit D-type transparent latches with 3-state outputs. The devices can be used as two 8-bit transparent latches or a single 16-bit transparent latch. The devices feature two latch enables (1LE and 2LE) and two output enables (1OE and 2OE), each controlling 8-bits. When nLE is HIGH, data at the inputs enter the latches. In this condition the latches are transparent, a latch output will change each time its corresponding D-input changes. When nLE is LOW the latches store the information that was present at the inputs a set-up time preceding the HIGH-to-LOW transition of nLE. A HIGH on nOE causes the outputs to assume a high-impedance OFF-state. Operation of the nOE input does not affect the state of the latches. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments.

Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.

This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.

Bus hold on the data inputs eliminates the need for external pull-up resistors to hold unused inputs.

特性

  • Overvoltage tolerant inputs to 5.5 V

  • Wide supply voltage range from 1.2 V to 3.6 V

  • CMOS low power dissipation

  • MULTIBYTE flow-through standard pinout architecture

  • Multiple low inductance supply pins for minimum noise and ground bounce

  • Direct interface with TTL levels

  • All data inputs have bus hold (74LVCH16373A only)

  • IOFF circuitry provides partial Power-down mode operation

  • Complies with JEDEC standards:
    • JESD8-7A (1.65 V to 1.95 V)
    • JESD8-5A (2.3 V to 2.7 V)
    • JESD8-C/JESD36 (2.7 V to 3.6 V)

  • ESD protection:

    • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

  • Specified from -40 °C to +85 °C and -40 °C to +125 °C

参数类型

Type numberProduct statusVCC (V)Logic switching levelsOutput drive capability (mA)tpd (ns)Power dissipation considerationsTamb (°C)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package name
74LVC16373ADGGProduction1.2 - 3.6TTL± 243.0low-40~125822.037TSSOP48
74LVC16373ADGVProduction1.2 - 3.6TTL± 243.0low-40~125822.037TVSOP48
74LVCH16373ADGGProduction1.2 - 3.6TTL± 243.0low-40~125822.037TSSOP48
74LVCH16373ADGVProduction1.2 - 3.6TTL± 243.0low-40~125822.037TVSOP48

封装

型号封装尺寸版本回流焊/波峰焊包装状态标示可订购的器件编号，（订购码(12NC)）
74LVC16373ADGG
TSSOP48
(SOT362-1) 		SOT362-1SSOP-TSSOP-VSO-WAVE
SOT362-1_118ActiveLVC16373A74LVC16373ADGG,118
( 9352 351 70118 )
74LVC16373ADGV
TVSOP48
(SOT480-1) 		SOT480-1SOT480-1_118Active74LVC16373A74LVC16373ADGVJ
( 9356 907 84118 )
74LVCH16373ADGG
TSSOP48
(SOT362-1) 		SOT362-1SSOP-TSSOP-VSO-WAVE
SOT362-1_118ActiveLVCH16373A74LVCH16373ADGG:11
( 9352 384 90118 )
74LVCH16373ADGV
TVSOP48
(SOT480-1) 		SOT480-1SOT480-1_118Active4LVCH16373A74LVCH16373ADGVJ
( 9356 907 96118 )

下表中的版本已停产。参见表 停产信息 了解更多信息。

型号封装尺寸版本回流焊/波峰焊包装状态标示可订购的器件编号，（订购码(12NC)）
74LVC16373ADGG
TSSOP48
(SOT362-1) 		SOT362-1SSOP-TSSOP-VSO-WAVE
SOT362-1_112Withdrawn / End-of-lifeLVC16373A74LVC16373ADGG,112
( 9352 351 70112 )

停产信息

型号可订购的器件编号，（订购码(12NC)）最后一次购买日期最后一次交货日期替代产品状态备注
74LVC16373ADGG9352351701122021-06-302021-12-3174LVC16373ADGG
    74LVC16373ADGG935235170518
    74LVC16373ADGG935235170512
    74LVCH16373ADGG935238490518
    74LVCH16373ADGG935238490512
    74LVCH16373ADGG9352384901122021-06-302021-12-3174LVCH16373ADGG

      环境信息

      型号可订购的器件编号化学成分RoHSRHF指示符无铅转换日期
      74LVC16373ADGG74LVC16373ADGG,11874LVC16373ADGGAlways Pb-free
      74LVC16373ADGV74LVC16373ADGVJ74LVC16373ADGVweek 25, 2019
      74LVCH16373ADGG74LVCH16373ADGG:1174LVCH16373ADGGAlways Pb-free
      74LVCH16373ADGV74LVCH16373ADGVJ74LVCH16373ADGVweek 25, 2019

      下表中的版本已停产。参见表 停产信息 了解更多信息。

      型号可订购的器件编号化学成分RoHSRHF指示符无铅转换日期
      74LVC16373ADGG74LVC16373ADGG,11274LVC16373ADGGAlways Pb-free
      品质及可靠性免责声明

      文档 (9)

      文件名称标题类型日期
      74LVC_LVCH16373A16-bit D-type transparent latch with 5 V tolerant inputs/outputs; 3-stateData sheet2024-04-23
      AN263Power considerations when using CMOS and BiCMOS logic devicesApplication note2023-02-07
      AN11009Pin FMEA for LVC familyApplication note2019-01-09
      lvc16373a74LVC16373A IBIS modelIBIS model2013-04-08
      lvch16373alvch16373a IBIS modelIBIS model2013-04-07
      Nexperia_document_leaflet_Logic_TVSOP48_16bitPortfolio_201903Smaller-footprint 16-bit logic with advanced featuresLeaflet2019-03-29
      SOT480-1plastic, thin shrink small outline package; 48 leads; 0.4 mm pitch; 9.7 mm x 4.4 mm x 1.1 mm bodyPackage information2022-06-22
      SSOP-TSSOP-VSO-WAVEFootprint for wave solderingWave soldering2009-10-08
      SOT362-1plastic thin shrink small outline package; 48 leads; body width 6.1 mmPackage information2024-01-05

      支持

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      模型

      文件名称标题类型日期
      lvc16373a74LVC16373A IBIS modelIBIS model2013-04-08
      lvch16373alvch16373a IBIS modelIBIS model2013-04-07

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