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74LVC1T45-Q100; 74LVCH1T45-Q100

Dual supply translating transceiver; 3-state

The 74LVC1T45-Q100; 74LVCH1T45-Q100 are single bit, dual supply transceivers with 3-state outputs that enable bidirectional level translation. They feature two 1-bit input-output ports (A and B), a direction control input (DIR) and dual supply pins (VCC(A) and VCC(B)). Both VCC(A) and VCC(B) can be supplied with any voltage between 1.2 V and 5.5 V. This flexibility makes the device suitable for translating between any of the low voltage nodes (1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V and 5.0 V). Pins A and DIR are referenced to VCC(A) and pin B is referenced to VCC(B). A HIGH on DIR allows transmission from A to B and a LOW on DIR allows transmission from B to A.

The devices are fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing any damaging backflow current through the device when it is powered down. In suspend mode when either VCC(A) or VCC(B) are at GND level, both A port and B port are in the high-impedance OFF-state.

Active bus hold circuitry in the 74LVCH1T45-Q100 holds unused or floating data inputs at a valid logic level.

This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.

特性

  • Automotive product qualification in accordance with AEC-Q100 (Grade 1)

    • Specified from -40 °C to +85 °C and from -40 °C to +125 °C

  • Wide supply voltage range:

    • VCC(A): 1.2 V to 5.5 V

    • VCC(B): 1.2 V to 5.5 V

  • High noise immunity

  • Maximum data rates:

    • 420 Mbps (3.3 V to 5.0 V translation)

    • 210 Mbps (translate to 3.3 V))

    • 140 Mbps (translate to 2.5 V)

    • 75 Mbps (translate to 1.8 V)

    • 60 Mbps (translate to 1.5 V)

  • Suspend mode

  • Latch-up performance exceeds 100 mA per JESD 78 Class II

  • ±24 mA output drive (VCC = 3.0 V)

  • Inputs accept voltages up to 5.5 V

  • Low power consumption: 16 μA maximum ICC

  • IOFF circuitry provides partial Power-down mode operation

  • Complies with JEDEC standards:

    • JESD8-7 (1.2 V to 1.95 V)

    • JESD8-5 (1.8 V to 2.7 V)

    • JESD8C (2.7 V to 3.6 V)

    • JESD36 (4.5 V to 5.5 V)

  • ESD protection:

    • HBM: ANSI/ESDA/JEDEC JS-001 class 3A exceeds 4000 V

    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

参数类型

Type numberProduct statusVCC(A) (V)VCC(B) (V)Logic switching levelsOutput drive capability (mA)tpd (ns)Nr of bitsPower dissipation considerationsTamb (°C)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package name
74LVC1T45GM-Q100Production1.2 - 5.51.2 - 5.5CMOS/LVTTL± 242.51low-40~1252946.8147XSON6
74LVC1T45GW-Q100Production1.2 - 5.51.2 - 5.5CMOS/LVTTL± 242.51low-40~12526841.4156TSSOP6
74LVCH1T45GW-Q100Production1.2 - 5.51.2 - 5.5CMOS/LVTTL± 242.51low-40~12526841.4156TSSOP6

封装

型号封装尺寸版本回流焊/波峰焊包装状态标示可订购的器件编号,(订购码(12NC))
74LVC1T45GM-Q100
XSON6
(SOT886)
SOT886REFLOW_BG-BD-1
SOT886_115ActiveV574LVC1T45GM-Q100X
( 9356 908 46115 )
74LVC1T45GW-Q100
TSSOP6
(SOT363-2)
SOT363-2SOT363-2_125ActiveV574LVC1T45GW-Q100H
( 9353 009 35125 )
74LVCH1T45GW-Q100
TSSOP6
(SOT363-2)
SOT363-2SOT363-2_125ActiveX574LVCH1T45GW-Q100H
( 9353 009 36125 )

环境信息

型号可订购的器件编号化学成分RoHSRHF指示符无铅转换日期
74LVC1T45GM-Q10074LVC1T45GM-Q100X74LVC1T45GM-Q100week 25, 2019
74LVC1T45GW-Q10074LVC1T45GW-Q100H74LVC1T45GW-Q100Always Pb-free
74LVCH1T45GW-Q10074LVCH1T45GW-Q100H74LVCH1T45GW-Q100Always Pb-free
品质及可靠性免责声明

文档 (10)

文件名称标题类型日期
74LVC_LVCH1T45_Q100Dual supply translating transceiver; 3-stateData sheet2023-08-04
AN10161PicoGate Logic footprintsApplication note2002-10-29
AN11009Pin FMEA for LVC familyApplication note2019-01-09
lvch1t45lvch1t45 IBIS modelIBIS model2013-04-07
lvc1t45lvc1t45 IBIS modelIBIS model2013-04-07
Nexperia_document_leaflet_Logic_Automotive_MicroPak_solutions_201904Automotive logic in MicroPak leadless packagesLeaflet2019-04-18
SOT363-2plastic thin shrink small outline package; 6 leads; body width 1.25 mmPackage information2022-11-21
MAR_SOT886MAR_SOT886 TopmarkTop marking2013-06-03
SOT886plastic, leadless extremely thin small outline package; 6 terminals; 0.5 mm pitch; 1 mm x 1.45 mm x 0.5 mm bodyPackage information2022-06-01
REFLOW_BG-BD-1Reflow soldering profileReflow soldering2021-04-06

支持

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模型

文件名称标题类型日期
lvch1t45lvch1t45 IBIS modelIBIS model2013-04-07
lvc1t45lvc1t45 IBIS modelIBIS model2013-04-07

样品

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