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74AVCH1T45-Q100

Dual-supply voltage level translator/transceiver; 3-state

The 74AVCH1T45-Q100 is a single bit, dual supply transceiver that enables bidirectional level translation. The 74AVCH1T45 has active bus hold circuitry which is provided to hold unused or floating data inputs at a valid logic level. The device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing potentially damaging backflow current through the device when it is powered down.

This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.

特性

  • Automotive product qualification in accordance with AEC-Q100 (Grade 1)

    • Specified from -40 °C to +85 °C and from -40 °C to +125 °C

  • Wide supply voltage range from 0.8 V to 3.6 V

  • High noise immunity

  • CMOS low power dissipation

  • Overvoltage tolerant inputs to 3.6 V

  • Dynamically controlled outpus

  • Complies with JEDEC standards:

    • JESD8-12 (0.8 V to 1.3 V)

    • JESD8-11 (0.9 V to 1.65 V)

    • JESD8-7 (1.2 V to 1.95 V)

    • JESD8-5 (1.8 V to 2.7 V)

    • JESD8-B (2.7 V to 3.6 V)

  • ESD protection:

    • MIL-STD-883, method 3015 Class 3B exceeds 8000 V

    • HBM JESD22-A114E Class 3B exceeds 8000 V

    • MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω)

  • Maximum data rates:

    • 500 Mbit/s (1.8 V to 3.3 V translation)

    • 320 Mbit/s (< 1.8 V to 3.3 V translation)

    • 320 Mbit/s (translate to 2.5 V or 1.8 V)

    • 280 Mbit/s (translate to 1.5 V)

    • 240 Mbit/s (translate to 1.2 V)

  • Suspend mode

  • Bus hold on data inputs

  • Latch-up performance exceeds 100 mA per JESD 78 Class II

  • Low noise overshoot and undershoot < 10 % of VCC

  • IOFF circuitry provides partial Power-down mode operation

参数类型

Type numberProduct statusVCC(A) (V)VCC(B) (V)Logic switching levelsOutput drive capability (mA)tpd (ns)Nr of bitsPower dissipation considerationsTamb (°C)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package name
74AVCH1T45GW-Q100Production0.8 - 3.60.8 - 3.6CMOS/LVTTL± 122.11very low-40~12526236.1150TSSOP6

封装

型号封装尺寸版本回流焊/波峰焊包装状态标示可订购的器件编号,(订购码(12NC))
74AVCH1T45GW-Q100
TSSOP6
(SOT363-2)
SOT363-2SOT363-2_125ActiveK574AVCH1T45GW-Q100H
( 9352 992 67125 )

环境信息

型号可订购的器件编号化学成分RoHSRHF指示符无铅转换日期
74AVCH1T45GW-Q10074AVCH1T45GW-Q100H74AVCH1T45GW-Q100Always Pb-free
品质及可靠性免责声明

文档 (6)

文件名称标题类型日期
74AVCH1T45_Q100Dual-supply voltage level translator/transceiver; 3-stateData sheet2022-03-31
AN10161PicoGate Logic footprintsApplication note2002-10-29
AN90007Pin FMEA for AVC familyApplication note2018-11-30
avch1t4574AVCH1T45 Ibis modelIBIS model2014-10-14
Nexperia_Selection_guide_2023Nexperia Selection Guide 2023Selection guide2023-05-10
SOT363-2plastic thin shrink small outline package; 6 leads; body width 1.25 mmPackage information2022-11-21

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模型

文件名称标题类型日期
avch1t4574AVCH1T45 Ibis modelIBIS model2014-10-14

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