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74AXP2T45

2-bit dual supply translating transceiver; 3-state

The 74AXP2T45 is a 2-bit, dual supply transceiver with 3-state outputs that enables bidirectional level translation. It features two 2-bit input-output ports (nA and nB), a direction control input (DIR) and dual supply pins (VCC(A) and VCC(B)). Both VCC(A) and VCC(B) can be supplied at any voltage between 0.9 V and 5.5 V making the device suitable for translating between any of the low voltage nodes (0.9 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V and 5.0 V). No power supply sequencing is required and output glitches during power supply transitions are prevented using patented circuitry. As a result glitches will not appear on the outputs for supply transitions during power-up/down between 20 mV/μs and 5.5 V/s. Pins A and DIR are referenced to VCC(A) and pin B is referenced to VCC(B). A HIGH on DIR allows transmission from A to B and a LOW on DIR allows transmission from B to A.

The device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing any damaging backflow current through the device when it is powered down. In suspend mode when either VCC(A) or VCC(B) are at GND level, both A and B are in the high-impedance OFF-state.

特性

  • Wide supply voltage range:

    • VCC(A): 0.9 V to 5.5 V

    • VCC(B): 0.9 V to 5.5 V

  • Low input capacitance; CI = 1.4 pF (typical)

  • Low output capacitance; CO = 4.4 pF (typical)

  • Low dynamic power consumption; CPD = 11 pF (typical)

  • Low static power consumption; ICC = 2 μA (25 °C maximum)

  • High noise immunity

  • Complies with JEDEC standard:

    • JESD8-12 (1.1 V to 1.3 V; inputs)

    • JESD8-11 (1.4 V to 1.6 V)

    • JESD8-7 (1.65 V to 1.95 V)

    • JESD8-5 (2.3 V to 2.7 V)

    • JESD8C (2.7 V to 3.6 V)

    • JESD12-6 (4.5 V to 5.5 V)

  • ESD protection:

    • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2 kV

    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1 kV

  • Latch-up performance exceeds 100 mA per JESD78D Class II

  • Inputs accept voltages up to 5.5 V

  • Low noise overshoot and undershoot < 10% of VCCO

  • IOFF circuitry provides partial power-down mode operation

  • Specified from -40 °C to +125 °C

参数类型

Type numberProduct statusVCC(A) (V)VCC(B) (V)Logic switching levelsOutput drive capability (mA)tpd (ns)Nr of bitsPower dissipation considerationsTamb (°C)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package name
74AXP2T45DCProduction0.9 - 5.50.9 - 5.5CMOS± 1292ultra low-40~12519629.7106VSSOP8
74AXP2T45GXProduction0.9 - 5.50.9 - 5.5CMOS± 1292ultra low-40~1252366.3142X2SON8

封装

型号封装尺寸版本回流焊/波峰焊包装状态标示可订购的器件编号，（订购码(12NC)）
74AXP2T45DC
VSSOP8
(SOT765-1) 		SOT765-1SOT765-1_125ActiveR574AXP2T45DCH
( 9356 908 54125 )
74AXP2T45GX
X2SON8
(SOT1233-2) 		SOT1233-2SOT1233-2_115ActiveR574AXP2T45GXX
( 9356 908 76115 )

环境信息

型号可订购的器件编号化学成分RoHSRHF指示符无铅转换日期
74AXP2T45DC74AXP2T45DCH74AXP2T45DCweek 25, 2019
74AXP2T45GX74AXP2T45GXX74AXP2T45GXweek 25, 2019
品质及可靠性免责声明

文档 (5)

文件名称标题类型日期
74AXP2T452-bit dual supply translating transceiver; 3-stateData sheet2022-06-23
AN90029Pin FMEA for AXPnT familyApplication note2021-07-13
axp2t4574AXP2T45 IBIS modelIBIS model2020-11-20
SOT1233-2plastic thermal enhanced extremely thin small outline package; no leads;8 terminals; body 1.35 x 0.8 x 0.32 mmPackage information2022-04-21
SOT765-1plastic, very thin shrink small outline package; 8 leads; 0.5 mm pitch; 2 mm x 2.3 mm x 1 mm bodyPackage information2022-06-03

支持

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模型

文件名称标题类型日期
axp2t4574AXP2T45 IBIS modelIBIS model2020-11-20

订购、定价与供货

样品

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