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74LVC273-Q100

Octal D-type flip-flop with reset; positive-edge trigger

The 74LVC273-Q100 is an octal positive-edge triggered D-type flip-flop. The device features clock (CP) and master reset (MR) inputs. The outputs Qn will assume the state of their corresponding D inputs that meet the set-up and hold time requirements on the LOW-to-HIGH clock (CP) transition. A LOW on MR forces the outputs LOW independently of clock and data inputs. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments.

Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.

This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.

特性

  • Automotive product qualification in accordance with AEC-Q100 (Grade 1)

    • Specified from -40 °C to +85 °C and from -40 °C to +125 °C

  • Wide supply voltage range from 1.2 V to 3.6 V

  • Overvoltage tolerant inputs to 5.5 V

  • CMOS low power consumption

  • Direct interface with TTL levels

  • Output drive capability 50 Ω transmission lines at +85 °C

  • Complies with JEDEC standard:

    • JESD8-7A (1.65 V to 1.95 V)

    • JESD8-5A (2.3 V to 2.7 V)

    • JESD8-C/JESD36 (2.7 V to 3.6 V)

  • ESD protection:

    • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

  • DHVQFN package with Side-Wettable Flanks enabling Automatic Optical Inspection (AOI) of solder joints

参数类型

Type numberProduct statusVCC (V)Logic switching levelsOutput drive capability (mA)tpd (ns)fmax (MHz)Power dissipation considerationsTamb (°C)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package name
74LVC273BQ-Q100Production1.2 - 3.6CMOS/LVTTL± 246230low-40~125799.650DHVQFN20
74LVC273D-Q100Production1.2 - 3.6CMOS/LVTTL± 246230low-40~1258527.761SO20
74LVC273PW-Q100Production1.2 - 3.6CMOS/LVTTL± 246230low-40~1251014.745TSSOP20

封装

型号封装尺寸版本回流焊/波峰焊包装状态标示可订购的器件编号，（订购码(12NC)）
74LVC273BQ-Q100
DHVQFN20
(SOT764-1) 		SOT764-1SOT764-1_115ActiveLVC27374LVC273BQ-Q100X
( 9353 024 59115 )
74LVC273D-Q100
SO20
(SOT163-1) 		SOT163-1WAVE_BG-BD-1
SOT163-1_118Active74LVC273D74LVC273D-Q100J
( 9353 024 61118 )
74LVC273PW-Q100
TSSOP20
(SOT360-1) 		SOT360-1SSOP-TSSOP-VSO-WAVE
SOT360-1_118ActiveLVC27374LVC273PW-Q100J
( 9353 024 62118 )

环境信息

型号可订购的器件编号化学成分RoHSRHF指示符无铅转换日期
74LVC273BQ-Q10074LVC273BQ-Q100X74LVC273BQ-Q100Always Pb-free
74LVC273D-Q10074LVC273D-Q100J74LVC273D-Q100Always Pb-free
74LVC273PW-Q10074LVC273PW-Q100J74LVC273PW-Q100Always Pb-free
品质及可靠性免责声明

文档 (11)

文件名称标题类型日期
74LVC273_Q100Octal D-type flip-flop with reset; positive-edge triggerData sheet2023-08-25
AN263Power considerations when using CMOS and BiCMOS logic devicesApplication note2023-02-07
AN11009Pin FMEA for LVC familyApplication note2019-01-09
lvc273lvc273 IBIS modelIBIS model2013-04-07
Nexperia_Selection_guide_2023Nexperia Selection Guide 2023Selection guide2023-05-10
lvclvc Spice modelSPICE model2013-05-06
SOT764-1plastic, leadless dual in-line compatible thermal enhanced very thin quad flat package; 20 terminals; 0.5 mm pitch; 4.5 mm x 2.5 mm x 1 mm bodyPackage information2022-06-21
SSOP-TSSOP-VSO-WAVEFootprint for wave solderingWave soldering2009-10-08
SOT360-1plastic, thin shrink small outline package; 20 leads; 0.65 mm pitch; 6.5 mm x 4.4 mm x 1.1 mm bodyPackage information2022-06-21
SOT163-1plastic, small outline package; 20 leads; 1.27 mm pitch; 12.8 mm x 7.5 mm x 2.65 mm bodyPackage information2022-06-20
WAVE_BG-BD-1Wave soldering profileWave soldering2021-09-08

支持

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模型

文件名称标题类型日期
lvc273lvc273 IBIS modelIBIS model2013-04-07
lvclvc Spice modelSPICE model2013-05-06

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