74AXP2T08

Dual supply 2-input AND gate

The 74AXP2T08 is a dual supply, dual 2-input AND gate. It features four inputs (nA and nB), two outputs (nY) and dual supply pins (VCCI and VCCO). The inputs are referenced to VCCI and the outputs are referenced to VCCO. All inputs can be connected directly to VCCI or GND. VCCI can be supplied at any voltage between 0.7 V and 2.75 V and VCCO can be supplied at any voltage between 1.2 V and 5.5 V. This feature allows voltage level translation.

Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.

This device ensures very low static and dynamic power consumption across the entire supply range and is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.

特性

  • Wide supply voltage range:
    • VCCI: 0.7 V to 2.75 V
    • VCCO: 1.2 V to 5.5 V
  • Low input capacitance; CI = 0.6 pF (typical)
  • Low output capacitance; CO = 1.8 pF (typical)
  • Low dynamic power consumption; CPD = 0.5 pF at VCCI = 1.2 V (typical)
  • Low dynamic power consumption; CPD = 7.1 pF at VCCO = 3.3 V (typical)
  • Low static power consumption; ICCI = 0.5 μA (85 °C maximum)
  • Low static power consumption; ICCO = 1.8 μA (85 °C maximum)
  • High noise immunity
  • Complies with JEDEC standard:
    • JESD8-12A.01 (1.1 V to 1.3 V; nA, nB inputs)
    • JESD8-11A.01 (1.4 V to 1.6 V)
    • JESD8-7A (1.65 V to 1.95 V)
    • JESD8-5A.01 (2.3 V to 2.7 V)
    • JESD8-C (2.7 V to 3.6 V; nY outputs)
    • JESD12-6 (4.5 V to 5.5 V; nY outputs)
  • ESD protection:
    • HBM ANSI/ESDA/JEDEC JS-001 Class 2 exceeds 2 kV
    • CDM JESD22-C101E exceeds 1000 V
  • Latch-up performance exceeds 100 mA per JESD78D Class II
  • Inputs accept voltages up to 2.75 V
  • Low noise overshoot and undershoot < 10% of VCCO
  • IOFF circuitry provides partial power-down mode operation
  • Multiple package options
  • Specified from -40 °C to +85 °C

参数类型

Type numberProduct statusVCC(A) (V)VCC(B) (V)Logic switching levelsOutput drive capability (mA)tpd (ns)No of bitsPower dissipation considerationsTamb (Cel)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package name
74AXP2T08DPProduction0.7 - 2.751.2 - 5.5CMOS+/- 124.62ultra low-40~12522723.3109TSSOP10
74AXP2T08GFProduction0.7 - 2.751.2 - 5.5CMOS+/- 124.62ultra low-40~125XSON10

封装

型号封装尺寸版本回流焊/波峰焊包装状态标示可订购的器件编号,(订购码(12NC))
74AXP2T08DP
TSSOP10
(SOT552-1)
SOT552-1SSOP-TSSOP-VSO-WAVE
Reel 13" Q1/T1ActiveStandard Marking74AXP2T08DPJ
( 9353 069 79118 )
74AXP2T08GF
XSON10
(SOT1081-2)
SOT1081-2Reel 7" Q1/T1ActiveStandard Marking74AXP2T08GFX
( 9353 069 81115 )

品质、可靠性及化学成分

型号可订购的器件编号化学成分RoHS / RHF无铅转换日期MSLMSL无铅
74AXP2T08DP74AXP2T08DPJ74AXP2T08DPAlways Pb-free11
74AXP2T08GF74AXP2T08GFX74AXP2T08GFAlways Pb-free11
品质及可靠性免责声明

文档 (7)

文件名称标题类型日期
74AXP2T08Dual supply, dual 2-input AND gateData sheet2017-03-17
Nexperia_document_guide_Logic_translators_201711Nexperia Logic TranslatorsBrochure2017-12-05
axp2t0874AXP2T08 IBIS modelIBIS model2016-03-01
SOT1081-2plastic, leadless extremely thin small outline package; 10 terminals; 0.35 mm pitch; 1.7 mm x 1 mm x 0.5 mm bodyOutline drawing2018-06-04
SOT552-1_118TSSOP10; Reel pack; SMD, 13" Q1/T1 Standard product orientation Orderable part number ending ,118 or J Ordering code (12NC) ending 118Packing2013-04-16
SSOP-TSSOP-VSO-WAVEFootprint for wave solderingWave soldering2009-10-08
SOT552-1plastic, thin shrink small outline package; 10 leads; 0.5 mm pitch; 3 mm x 3 mm x 1.1 mm bodyOutline drawing2018-02-23

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模型

文件名称标题类型日期
axp2t0874AXP2T08 IBIS modelIBIS model2016-03-01

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