74LVC2G02DC-Q100

Dual 2-input NOR gate

The 74LVC2G02-Q100 provides a 2-input NOR gate function.

Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 V and 5 V environment.

This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing a damaging backflow current through the device when it is powered down.

This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.

特性

  • Automotive product qualification in accordance with AEC-Q100 (Grade 1)
    • Specified from -40 °C to +85 °C and from -40 °C to +125 °C
  • Wide supply voltage range from 1.65 V to 5.5 V
  • 5 V tolerant outputs for interfacing with 5 V logic
  • High noise immunity
  • ±24 mA output drive (VCC = 3.0 V)
  • CMOS low power consumption
  • Complies with JEDEC standard:
    • JESD8-7 (1.65 V to 1.95 V)
    • JESD8-5 (2.3 V to 2.7 V)
    • JESD8-B/JESD36 (2.7 V to 3.6 V)
  • Latch-up performance exceeds 250 mA
  • Direct interface with TTL levels
  • Inputs accept voltages up to 5 V
  • ESD protection:
    • MIL-STD-883, method 3015 exceeds 2000 V
    • HBM JESD22-A114F exceeds 2000 V
    • MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω)
  • Multiple package options

目标应用

参数类型

型号Product statusVCC (V)Logic switching levelsOutput drive capability (mA)tpd (ns)fmax (MHz)No of bitsPower dissipation considerationsTamb (Cel)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package name
74LVC2G02DC-Q100Production1.65 - 5.5CMOS/LVTTL+/- 322.41502low-40~12520032.4110VSSOP8

Package

型号封装尺寸版本回流焊/波峰焊包装状态标示可订购的器件编号,(订购码(12NC))
74LVC2G02DC-Q100
VSSOP8
(SOT765-1)
SOT765-1Reel 7" Q3/T4, ReverseActiveV0274LVC2G02DC-Q100H
( 9353 004 58125 )

品质、可靠性及化学成分

型号可订购的器件编号化学成分RoHS / RHF无铅转换日期EFRMSLMSL无铅
74LVC2G02DC-Q10074LVC2G02DC-Q100H74LVC2G02DC-Q100Always Pb-free123.811
品质及可靠性免责声明

文档 (8)

文件名称标题类型日期
74LVC2G02_Q100Dual 2-input NOR gateData sheet2017-03-17
AN11009Pin FMEA for LVC familyApplication note2011-02-04
AN212Package lead inductance considerations in high-speed applicationsApplication note2013-03-13
AN10156Sorting through the low voltage logic mazeApplication note2013-03-13
75017668Low voltage CMOS family - LVCBrochure2015-07-09
lvc2g0274LVC2G02 IBIS modelIBIS model2014-10-20
SOT765-1_125VSSOP8; Reel pack, reverse; SMD, 7" Q3/T4 Standard product orientation Orderable part number ending ,125 or H Ordering code (12NC) ending 125Packing2013-05-03
SOT765-1plastic, very thin shrink small outline package; 8 leads; 0.5 mm pitch; 2 mm x 2.3 mm x 1 mm bodyOutline drawing2017-01-30

支持

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模型

文件名称标题类型日期
lvc2g0274LVC2G02 IBIS modelIBIS model2014-10-20

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