74LVC138ABQ-Q100

3-to-8 line decoder/demultiplexer; inverting

The 74LVC138A-Q100 is a 3-to-8 line decoder/demultiplexer. It accepts three binary weighted address inputs (A0, A1 and A2). When the inputs are enabled, it provides eight mutually exclusive outputs (Y0 to Y7) that are LOW when selected.

There are three enable inputs: two active LOW (E1 and E2) and one active HIGH (E3). Every output is HIGH unless E1 and E2 are LOW and E3 is HIGH.

This multiple enable function allows easy parallel expansion of the device to a 1-of-32 (5 lines to 32 lines) decoder with just four 74LVC138A-Q100 devices and one inverter. The 74LVC138A-Q100 can be used as an eight output demultiplexer by using one of the active LOW enable inputs as the data input and the remaining enable inputs as strobes. Unused enable inputs must be permanently tied to their appropriate active HIGH or LOW state.

This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.

特性

  • Automotive product qualification in accordance with AEC-Q100 (Grade 1)
    • Specified from -40 °C to +85 °C and from -40 °C to +125 °C
  • 5 V tolerant inputs for interfacing with 5 V logic
  • Wide supply voltage range from 1.2 V to 3.6 V
  • CMOS low power consumption
  • Direct interface with TTL levels
  • Demultiplexing capability
  • Multiple input enable for easy expansion
  • Ideal for memory chip select decoding
  • Mutually exclusive outputs
  • Output drive capability 50 Ω transmission lines at 125 °C
  • Complies with JEDEC standard:
    • JESD8-7A (1.65 V to 1.95 V)
    • JESD8-5A (2.3 V to 2.7 V)
    • JESD8-C/JESD36 (2.7 V to 3.6 V)
  • ESD protection:
    • MIL-STD-883, method 3015 exceeds 2000 V
    • HBM JESD22-A114F exceeds 2000 V
    • MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω)
  • Multiple package options

目标应用

参数类型

型号Product statusVCC (V)Logic switching levelsOutput drive capability (mA)tpd (ns)Power dissipation considerationsTamb (Cel)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package name
74LVC138ABQ-Q100Production1.2 - 3.6CMOS/LVTTL+/- 242.7low-40~1259414.563DHVQFN16

Package

型号封装尺寸版本回流焊/波峰焊包装状态标示可订购的器件编号,(订购码(12NC))
74LVC138ABQ-Q100
DHVQFN16
(SOT763-1)
SOT763-1Reel 7" Q1/T1ActiveVC138A74LVC138ABQ-Q100X
( 9353 014 09115 )

品质、可靠性及化学成分

型号可订购的器件编号化学成分RoHS / RHF无铅转换日期EFRMSLMSL无铅
74LVC138ABQ-Q10074LVC138ABQ-Q100X74LVC138ABQ-Q100Always Pb-free123.811
品质及可靠性免责声明

文档 (5)

文件名称标题类型日期
74LVC138A_Q1003-to-8 line decoder/demultiplexer; invertingData sheet2017-05-03
AN11009Pin FMEA for LVC familyApplication note2011-02-04
lvc138alvc138a IBIS modelIBIS model2013-04-07
SOT763-1_115DHVQFN16; Reel pack, SMD, 7" Q1/T1 standard product orientation Orderable part number ending ,115 or X Ordering code (12NC) ending 115Packing2016-07-05
SOT763-1plastic, leadless dual in-line compatible thermal enhanced very thin quad flat package; 16 terminals; 0.5 mm pitch; 3.5 mm x 2.5 mm x 0.85 mm bodyOutline drawing2018-06-04

支持

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模型

文件名称标题类型日期
lvc138alvc138a IBIS modelIBIS model2013-04-07

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