特性
- 5 V tolerant inputs/outputs for interfacing with 5 V logic
- Wide supply voltage range from 1.2 V to 3.6 V
- CMOS low power consumption
- Direct interface with TTL levels
- Flow-through pinout architecture
- 9-bit positive edge-triggered register
- Independent register and 3-state buffer operation
- Complies with JEDEC standard:
- JESD8-7A (1.65 V to 1.95 V)
- JESD8-5A (2.3 V to 2.7 V)
- JESD8-C/JESD36 (2.7 V to 3.6 V)
- ESD protection:
- HBM JESD22-A114F exceeds 2000 V
- MM JESD22-A115-B exceeds 200 V
- CDM JESD22-C101E exceeds 1000 V
- Specified from -40 °C to +85 °C and -40 °C to +125 °C.
文档 (6)
文件名称 | 标题 | 类型 | 日期 |
---|---|---|---|
74LVC823A | 9-bit D-type flip-flop with 5 V tolerant inputs/outputs; positive edge-trigger; 3-state | Data sheet | 2020-06-19 |
AN263 | Power considerations when using CMOS and BiCMOS logic devices | Application note | 2023-02-07 |
AN11009 | Pin FMEA for LVC family | Application note | 2019-01-09 |
lvc823a | lvc823a IBIS model | IBIS model | 2013-04-07 |
Nexperia_Selection_guide_2023 | Nexperia Selection Guide 2023 | Selection guide | 2023-05-10 |
lvc | lvc Spice model | SPICE model | 2013-05-06 |