74AXP2T08

Dual supply, dual 2-input AND gate

The 74AXP2T08 is a dual supply, dual 2-input AND gate. It features four inputs (nA and nB), two outputs (nY) and dual supply pins (V_CCI and V_CCO). The inputs are referenced to V_CCI and the outputs are referenced to V_CCO. All inputs can be connected directly to V_CCI or GND. V_CCI can be supplied at any voltage between 0.7 V and 2.75 V and V_CCO can be supplied at any voltage between 1.2 V and 5.5 V. This feature allows voltage level translation.

Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.

This device ensures very low static and dynamic power consumption across the entire supply range and is fully specified for partial power down applications using I_OFF. The I_OFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.

特性

Wide supply voltage range:
- V_CCI: 0.7 V to 2.75 V
- V_CCO: 1.2 V to 5.5 V
Low input capacitance; C_I = 0.6 pF (typical)
Low output capacitance; C_O = 1.8 pF (typical)
Low dynamic power consumption; C_PD = 0.5 pF at V_CCI = 1.2 V (typical)
Low dynamic power consumption; C_PD = 7.1 pF at V_CCO = 3.3 V (typical)
Low static power consumption; I_CCI = 0.5 μA (85 °C maximum)
Low static power consumption; I_CCO = 1.8 μA (85 °C maximum)
High noise immunity
Complies with JEDEC standard:
- JESD8-12A.01 (1.1 V to 1.3 V; nA, nB inputs)
- JESD8-11A.01 (1.4 V to 1.6 V)
- JESD8-7A (1.65 V to 1.95 V)
- JESD8-5A.01 (2.3 V to 2.7 V)
- JESD8-C (2.7 V to 3.6 V; nY outputs)
- JESD12-6 (4.5 V to 5.5 V; nY outputs)
ESD protection:
- HBM ANSI/ESDA/JEDEC JS-001 Class 2 exceeds 2 kV
- CDM JESD22-C101E exceeds 1000 V
Latch-up performance exceeds 100 mA per JESD78D Class II
Inputs accept voltages up to 2.75 V
Low noise overshoot and undershoot < 10% of V_CCO
I_OFF circuitry provides partial power-down mode operation
Specified from -40 °C to +85 °C and from -40 °C to +125 °C

文档 (6)

文件名称	标题	类型	日期
74AXP2T08	Dual supply, dual 2-input AND gate	Data sheet	2021-05-10
AN90029	Pin FMEA for AXPnT family	Application note	2021-07-13
Nexperia_document_guide_Logic_translators	Nexperia Logic Translators	Brochure	2021-04-12
axp2t08	74AXP2T08 IBIS model	IBIS model	2016-03-01
Nexperia_document_leaflet_Logic_AXP_technology_portfolio_201904	AXP – Extremely low-power logic technology portfolio	Leaflet	2019-04-05
Nexperia_Selection_guide_2023	Nexperia Selection Guide 2023	Selection guide	2023-05-10

支持

如果您需要设计/技术支持，请告知我们并填写应答表, 我们会尽快回复您。

模型

文件名称	标题	类型	日期
axp2t08	74AXP2T08 IBIS model	IBIS model	2016-03-01