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74ALVT16821

20-bit bus interface D-type flip-flop; positive-edge trigger; 3-state

The 74ALVT16821 high-performance Bipolar Complementary Metal Oxide Semiconductor (BiCMOS) device combines low static and dynamic power dissipation with high speed and high output drive. It is designed for VCC operation at 2.5 V or 3.3 V with I/O compatibility to 5 V.

The 74ALVT16821 has two 10-bit, edge triggered registers, with each register coupled to a 3-state output buffer. The two sections of each register are controlled independently by the clock (nCP) and output enable (nOE) control gates.

Each register is fully edge triggered. The state of each D input, one set-up time before the LOW-to-HIGH clock transition, is transferred to the corresponding flip-flops Q output.

The 3-state output buffers are designed to drive heavily loaded 3-state buses, MOS memories, or MOS microprocessors.

The active low output enable (nOE) controls all ten 3-state buffers independent of the register operation. When nOE is LOW, the data in the register appears at the outputs. When nOE is HIGH, the outputs are in high-impedance OFF-state, which means they will neither drive nor load the bus.

特性

  • 20-bit positive-edge triggered register

  • 5 V I/O compatible

  • Multiple VCC and GND pins minimize switching noise

  • Bus hold data inputs eliminate the need for external pull-up resistors to hold unused inputs

  • Live insertion and extraction permitted

  • Power-up reset

  • Power-up 3-state

  • Output capability: +64 mA and -32 mA

  • Latch-up protection:

    • JESD78: exceeds 500 mA

  • ESD protection:

    • MIL STD 883, method 3015: exceeds 2000 V

    • Machine model: exceeds 200 V

参数类型

Type numberProduct statusVCC (V)Logic switching levelsOutput drive capability (mA)tpd (ns)fmax (MHz)Power dissipation considerationsTamb (°C)Rth(j-a) (K/W)Ψth(j-top) (K/W)Package name
74ALVT16821DGGProduction2.3 - 3.6TTL-32/+641.8150medium-40~859321.0TSSOP56

封装

型号封装尺寸版本回流焊/波峰焊包装状态标示可订购的器件编号，（订购码(12NC)）
74ALVT16821DGG
TSSOP56
(SOT364-1) 		SOT364-1SSOP-TSSOP-VSO-WAVE
SOT364-1_118ActiveALVT1682174ALVT16821DGG,118
( 9352 100 10118 )

下表中的版本已停产。参见表 停产信息 了解更多信息。

型号封装尺寸版本回流焊/波峰焊包装状态标示可订购的器件编号，（订购码(12NC)）
74ALVT16821DGG
TSSOP56
(SOT364-1) 		SOT364-1SSOP-TSSOP-VSO-WAVE
SOT364-1_518Discontinued / End-of-lifeALVT1682174ALVT16821DGGY
( 9352 100 10518 )

停产信息

型号可订购的器件编号，（订购码(12NC)）最后一次购买日期最后一次交货日期替代产品状态备注
74ALVT16821DGG935210010518
74ALVT16821DGG9352100105122021-12-312022-06-3074ALVT16821DGG
    74ALVT16821DGG935210010112

    环境信息

    型号可订购的器件编号化学成分RoHSRHF指示符无铅转换日期
    74ALVT16821DGG74ALVT16821DGG,11874ALVT16821DGGweek 2, 2006

    下表中的版本已停产。参见表 停产信息 了解更多信息。

    型号可订购的器件编号化学成分RoHSRHF指示符无铅转换日期
    74ALVT16821DGG74ALVT16821DGGY74ALVT16821DGGAlways Pb-free
    品质及可靠性免责声明

    文档 (6)

    文件名称标题类型日期
    74ALVT1682120-bit bus interface D-type flip-flop; positive-edge trigger; 3-stateData sheet2018-01-23
    alvt16821alvt16821 IBIS modelIBIS model2013-04-07
    Nexperia_Selection_guide_2023Nexperia Selection Guide 2023Selection guide2023-05-10
    alvt16alvt16 Spice modelSPICE model2013-05-06
    SSOP-TSSOP-VSO-WAVEFootprint for wave solderingWave soldering2009-10-08
    SOT364-1plastic, thin shrink small outline package; 56 leads; 0.5 mm pitch; 14 mm x 6.1 mm x 1.2 mm bodyPackage information2022-06-23

    支持

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    模型

    文件名称标题类型日期
    alvt16821alvt16821 IBIS modelIBIS model2013-04-07
    alvt16alvt16 Spice modelSPICE model2013-05-06

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