×

74LVC1G97-Q100

Low-power configurable multiple function gate

The 74LVC1G97-Q100 is a configurable multiple function gate with Schmitt-trigger inputs. The device can be configured as any of the following logic functions MUX, AND, OR, NAND, NOR, inverter and buffer; using the 3-bit input. All inputs can be connected to VCC or GND.

Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments.

This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.

This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.

特性

  • Automotive product qualification in accordance with AEC-Q100 (Grade 1)

    • Specified from -40 °C to +85 °C and -40 °C to +125 °C

  • Wide supply voltage range from 1.65 V to 5.5 V

  • 5 V tolerant input/output for interfacing with 5 V logic

  • High noise immunity

  • Complies with JEDEC standard:

    • JESD8-7 (1.65 V to 1.95 V)

    • JESD8-5 (2.3 V to 2.7 V)

    • JESD8B/JESD36 (2.7 V to 3.6 V).

  • ±24 mA output drive (VCC = 3.0 V)

  • CMOS low power consumption

  • Latch-up performance exceeds 250 mA

  • Direct interface with TTL levels

  • Inputs accept voltages up to 5 V

  • ESD protection:

    • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

参数类型

Type numberProduct statusVCC (V)Logic switching levelsOutput drive capability (mA)tpd (ns)fmax (MHz)Nr of bitsPower dissipation considerationsTamb (°C)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package name
74LVC1G97GW-Q100Production1.65 - 5.5TTL± 326.31501low-40~12527750.1165TSSOP6

封装

型号封装尺寸版本回流焊/波峰焊包装状态标示可订购的器件编号,(订购码(12NC))
74LVC1G97GW-Q100
TSSOP6
(SOT363-2)
SOT363-2SOT363-2_125ActiveYV74LVC1G97GW-Q100H
( 9356 907 25125 )

环境信息

型号可订购的器件编号化学成分RoHSRHF指示符无铅转换日期
74LVC1G97GW-Q10074LVC1G97GW-Q100H74LVC1G97GW-Q100week 25, 2019
品质及可靠性免责声明

文档 (6)

文件名称标题类型日期
74LVC1G97_Q100Low-power configurable multiple function gateData sheet2023-08-28
AN10161PicoGate Logic footprintsApplication note2002-10-29
AN11009Pin FMEA for LVC familyApplication note2019-01-09
lvc1g9774LVC1G97 IBIS modelIBIS model2014-10-20
Nexperia_Selection_guide_2023Nexperia Selection Guide 2023Selection guide2023-05-10
SOT363-2plastic thin shrink small outline package; 6 leads; body width 1.25 mmPackage information2022-11-21

支持

如果您需要设计/技术支持,请告知我们并填写 应答表, 我们会尽快回复您。

模型

文件名称标题类型日期
lvc1g9774LVC1G97 IBIS modelIBIS model2014-10-20

订购、定价与供货

样品

安世半导体客户可通过我们的销售机构或直接通过在线样品商店订购样品: https://extranet.nexperia.com.

样品订单通常需要2-4天寄送时间。

如果您尚未取得安世半导体的直接采购帐号,我们的全球与区域经销网络可以协助您取得样品。