特性
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Complies with JEDEC standard no. 7A
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Input levels:
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For 74HC163: CMOS level
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For 74HCT163: TTL level
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Synchronous counting and loading
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2 count enable inputs for n-bit cascading
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Synchronous reset
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Positive-edge triggered clock
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ESD protection:
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HBM JESD22-A114F exceeds 2000 V
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MM JESD22-A115-A exceeds 200 V
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Multiple package options
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Specified from ‑40 °C to +85 °C and ‑40 °C to +125 °C
目标应用
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Television sets
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Home-sound sets
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Multimedia systems
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All mains fed audio systems
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Car audio (boosters)
文档 (4)
文件名称 | 标题 | 类型 | 日期 |
---|---|---|---|
74HC_HCT163 | Presettable synchronous 4-bit binary counter; synchronous reset | Data sheet | 2018-10-12 |
AN11044 | Pin FMEA 74HC/74HCT family | Application note | 2019-01-09 |
hc | HC/HCT Spice model | SPICE model | 2022-02-17 |
HCT_USER_GUIDE | HC/T User Guide | User manual | 1997-10-31 |