特性
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Wide supply voltage range from 1.2 V to 3.6 V
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CMOS low power consumption
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Low inductance multiple VCC and GND pins for minimum noise and ground bounce
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Input/output tolerant up to 3.6 V
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Dynamic controlled output (DCO) circuit dynamically changes the output impedance, resulting in noise reduction without speed degradation
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Bus hold on all data inputs
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Supports Live Insertion
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Complies with JEDEC standards:
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JESD8-7 (1.2 V to 1.95 V)
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JESD8-5 (1.8 V to 2.7 V)
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JESD8-1A (2.7 V to 3.6 V)
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文档 (2)
文件名称 | 标题 | 类型 | 日期 |
---|---|---|---|
74AVCH16244 | 16-bit buffer/line driver; 3.6 V tolerant; 3-state | Data sheet | 2018-02-20 |
AN90007 | Pin FMEA for AVC family | Application note | 2018-11-30 |
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