双极性晶体管

二极管

ESD保护、TVS、滤波和信号调节ESD保护

MOSFET

氮化镓场效应晶体管(GaN FET)

绝缘栅双极晶体管(IGBTs)

模拟和逻辑IC

汽车应用认证产品(AEC-Q100/Q101)

74HC2G02-Q100; 74HCT2G02-Q100

Dual 2-input NOR gate

The 74HC2G02-Q100; 74HCT2G02-Q100 is a dual 2-input NOR gate. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.

The 74HCT2G02-Q100 features reduced input threshold levels to allow interfacing to TTL logic levels.

This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.

Features and benefits

  • Automotive product qualification in accordance with AEC-Q100 (Grade 1)

    • Specified from -40 °C to +85 °C and from -40 °C to +125 °C

  • Wide supply voltage range from 2.0 V to 6.0 V

  • Input levels:

    • For 74HC2G02-Q100: CMOS level

    • For 74HCT2G02-Q100: TTL level

  • CMOS low power dissipation

  • High noise immunity

  • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B

  • Complies with JEDEC standard no. 7A (4.5 V to 5.5 V)

  • ESD protection:

    • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

参数类型

型号 VCC (V) Logic switching levels Output drive capability (mA) tpd (ns) fmax (MHz) Nr of bits Power dissipation considerations Tamb (°C) Rth(j-a) (K/W) Ψth(j-top) (K/W) Rth(j-c) (K/W) Package name
74HC2G02DC-Q100 2.0 - 6.0 CMOS ± 5.2 9 36 2 low -40~125 204 35.1 115 VSSOP8
74HC2G02DP-Q100 2.0 - 6.0 CMOS ± 5.2 9 36 2 low -40~125 216 20.5 106 TSSOP8
74HCT2G02DC-Q100 4.5 - 5.5 TTL ± 4 12 36 2 low -40~125 204 35.1 115 VSSOP8
74HCT2G02DP-Q100 4.5 - 5.5 TTL ± 4 12 36 2 low -40~125 216 20.5 106 TSSOP8

封装

型号 可订购的器件编号，（订购码(12NC)） 状态 标示 封装 外形图 回流焊/波峰焊 包装
74HC2G02DC-Q100 74HC2G02DC-Q100H
(935300842125)		 Active H02 SOT765-1
VSSOP8
(SOT765-1) 		SOT765-1 SOT765-1_125
74HC2G02DP-Q100 74HC2G02DP-Q100H
(935300843125)		 Active H02 SOT505-2
TSSOP8
(SOT505-2) 		SOT505-2 SOT505-2_125
74HCT2G02DC-Q100 74HCT2G02DC-Q100H
(935300844125)		 Active T02 SOT765-1
VSSOP8
(SOT765-1) 		SOT765-1 SOT765-1_125
74HCT2G02DP-Q100 74HCT2G02DP-Q100H
(935300845125)		 Active T02 SOT505-2
TSSOP8
(SOT505-2) 		SOT505-2 SOT505-2_125

环境信息

型号 可订购的器件编号 化学成分 RoHS RHF指示符
74HC2G02DC-Q100 74HC2G02DC-Q100H 74HC2G02DC-Q100 rohs rhf rhf
74HC2G02DP-Q100 74HC2G02DP-Q100H 74HC2G02DP-Q100 rohs rhf rhf
74HCT2G02DC-Q100 74HCT2G02DC-Q100H 74HCT2G02DC-Q100 rohs rhf rhf
74HCT2G02DP-Q100 74HCT2G02DP-Q100H 74HCT2G02DP-Q100 rohs rhf rhf
品质及可靠性免责声明

文档 (12)

文件名称 标题 类型 日期
74HC_HCT2G02_Q100 Dual 2-input NOR gate Data sheet 2023-11-14
AN10161 PicoGate Logic footprints Application note 2002-10-29
AN11044 Pin FMEA 74HC/74HCT family Application note 2019-01-09
AN90063 Questions about package outline drawings Application note 2025-06-13
mna105 Block diagram: 74AUP2G02DC, 74AUP2G02GD, 74AUP2G02GM, 74AUP2G02GT, 74HC2G02DC, 74HC2G02DP, 74HC2G02GD, 74HCT2G02DC, 74HCT2G02DP, 74HCT2G02GD Block diagram 2009-11-03
Nexperia_document_guide_MiniLogic_PicoGate_201901 PicoGate leaded logic portfolio guide Brochure 2019-01-07
SOT765-1 3D model for products with SOT765-1 package Design support 2020-01-22
SOT505-2 3D model for products with SOT505-2 package Design support 2019-01-18
Nexperia_package_poster Nexperia package poster Leaflet 2020-05-15
VSSOP8_SOT765-1_mk plastic, very thin shrink small outline package; 8 leads; 0.5 mm pitch; 2 mm x 2.3 mm x 1 mm body Marcom graphics 2017-01-28
SOT765-1 plastic, very thin shrink small outline package; 8 leads; 0.5 mm pitch; 2 mm x 2.3 mm x 1 mm body Package information 2022-06-03
SOT505-2 plastic, thin shrink small outline package; 8 leads; 0.65 mm pitch; 3 mm x 3 mm x 1.1 mm body Package information 2022-06-03

支持

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模型

文件名称 标题 类型 日期
SOT765-1 3D model for products with SOT765-1 package Design support 2020-01-22
SOT505-2 3D model for products with SOT505-2 package Design support 2019-01-18

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