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Click here for more information74ABT16821ADL
20-bit bus-interface D-type flip-flop; positive-edge trigger; 3-state
The 74ABT16821A high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive.
The 74ABT16821A has two 10-bit, edge-triggered registers, with each register coupled to a 3-state output buffer. The two sections of each register are controlled independently by the clock (nCP) and output enable (nOE) control gates.
Each register is fully edge triggered. The state of each D input, one set-up time before the LOW-to-HIGH clock transition, is transferred to the corresponding flip-flops Q output.
The 3-state output buffers are designed to drive heavily loaded 3-state buses, MOS memories, or MOS microprocessors.
The active-LOW output enable (nOE) controls all ten 3-state buffers independent of the register operation. When nOE is LOW, the data in the register appears at the outputs. When nOE is HIGH, the outputs are in high-impedance OFF-state, which means they will neither drive nor load the bus.
Features and benefits
- 20-bit positive-edge triggered register
- Multiple VCC and GND pins minimize switching noise
- Live insertion and extraction permitted
- Output capability: +64 mA and -32 mA
- Power-up 3-state
- Power-up reset
- Latch-up protection exceeds 500 mA per JESD78B class II level A
- ESD protection:
- HBM JESD22-A114F exceeds 2000 V
- MM JESD22-A115-A exceeds 200 V
Applications
封装
下表中的所有产品型号均已停产 。
型号 | 可订购的器件编号,(订购码(12NC)) | 状态 | 标示 | 封装 | 外形图 | 回流焊/波峰焊 | 包装 |
---|---|---|---|---|---|---|---|
74ABT16821ADL | 74ABT16821ADL,112 (935196760112) |
Obsolete | ABT16821A Standard Procedure Standard Procedure |
![]() SSOP56 (SOT371-1) |
SOT371-1 |
SSOP-TSSOP-VSO-REFLOW
SSOP-TSSOP-VSO-WAVE |
暂无信息 |
74ABT16821ADL,118 (935196760118) |
Obsolete | ABT16821A Standard Procedure Standard Procedure | 暂无信息 | ||||
74ABT16821ADL,512 (935196760512) |
Obsolete | ABT16821A Standard Procedure Standard Procedure | 暂无信息 | ||||
74ABT16821ADL,518 (935196760518) |
Obsolete | ABT16821A Standard Procedure Standard Procedure | 暂无信息 |
环境信息
下表中的所有产品型号均已停产 。
文档 (6)
文件名称 | 标题 | 类型 | 日期 |
---|---|---|---|
AN90063 | Questions about package outline drawings | Application note | 2025-03-12 |
Nexperia_package_poster | Nexperia package poster | Leaflet | 2020-05-15 |
SOT371-1 | plastic, shrink small outline package; 56 leads; 0.635 mm pitch; 18.45 mm x 7.5 mm x 2.8 mm body | Package information | 2020-04-21 |
SSOP-TSSOP-VSO-REFLOW | Footprint for reflow soldering | Reflow soldering | 2009-10-08 |
abt16 | abt16 Spice model | SPICE model | 2013-05-07 |
SSOP-TSSOP-VSO-WAVE | Footprint for wave soldering | Wave soldering | 2009-10-08 |
Longevity
The Nexperia Longevity Program is aimed to provide our customers information from time to time about the expected time that our products can be ordered. The NLP is reviewed and updated regularly by our Executive Management Team. View our longevity program here.
模型
文件名称 | 标题 | 类型 | 日期 |
---|---|---|---|
abt16 | abt16 Spice model | SPICE model | 2013-05-07 |
How does it work?
The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.