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74AXP2T08DP

Dual supply, dual 2-input AND gate

The 74AXP2T08 is a dual supply, dual 2-input AND gate. It features four inputs (nA and nB), two outputs (nY) and dual supply pins (VCCI and VCCO). The inputs are referenced to VCCI and the outputs are referenced to VCCO. All inputs can be connected directly to VCCI or GND. VCCI can be supplied at any voltage between 0.7 V and 2.75 V and VCCO can be supplied at any voltage between 1.2 V and 5.5 V. This feature allows voltage level translation.

Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.

This device ensures very low static and dynamic power consumption across the entire supply range and is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.

该产品已停产。参见单击此处了解停产信息和替代产品。

Alternatives

Features and benefits

  • Wide supply voltage range:

    • VCCI: 0.7 V to 2.75 V

    • VCCO: 1.2 V to 5.5 V

  • Low input capacitance; CI = 0.6 pF (typical)

  • Low output capacitance; CO = 1.8 pF (typical)

  • Low dynamic power consumption; CPD = 0.5 pF at VCCI = 1.2 V (typical)

  • Low dynamic power consumption; CPD = 7.1 pF at VCCO = 3.3 V (typical)

  • Low static power consumption; ICCI = 0.5 μA (85 °C maximum)

  • Low static power consumption; ICCO = 1.8 μA (85 °C maximum)

  • High noise immunity

  • Complies with JEDEC standard:

    • JESD8-12A.01 (1.1 V to 1.3 V; nA, nB inputs)

    • JESD8-11A.01 (1.4 V to 1.6 V)

    • JESD8-7A (1.65 V to 1.95 V)

    • JESD8-5A.01 (2.3 V to 2.7 V)

    • JESD8-C (2.7 V to 3.6 V; nY outputs)

    • JESD12-6 (4.5 V to 5.5 V; nY outputs)

  • ESD protection:

    • HBM ANSI/ESDA/JEDEC JS-001 Class 2 exceeds 2 kV

    • CDM JESD22-C101E exceeds 1000 V

  • Latch-up performance exceeds 100 mA per JESD78D Class II

  • Inputs accept voltages up to 2.75 V

  • Low noise overshoot and undershoot < 10% of VCCO

  • IOFF circuitry provides partial power-down mode operation

  • Specified from -40 °C to +85 °C and from -40 °C to +125 °C

参数类型

型号 Product status VCC(A) (V) VCC(B) (V) Logic switching levels Output drive capability (mA) tpd (ns) Nr of bits Power dissipation considerations Tamb (°C) Rth(j-a) (K/W) Ψth(j-top) (K/W) Rth(j-c) (K/W) Package name
74AXP2T08DP End of life 0.7 - 2.75 1.2 - 5.5 CMOS ± 12 4.6 2 ultra low -40~125 227 23.3 109 TSSOP10

PCB Symbol, Footprint and 3D Model

Model Name 描述

封装

下表中的所有产品型号已停产。参见表 停产信息 了解更多信息。

型号 可订购的器件编号，（订购码(12NC)） 状态 标示 封装 外形图 回流焊/波峰焊 包装
74AXP2T08DP 74AXP2T08DPJ
(935306979118)		 Obsolete no package information

环境信息

下表中的所有产品型号已停产。参见表 停产信息 了解更多信息。

型号 可订购的器件编号 化学成分 RoHS RHF指示符
74AXP2T08DP 74AXP2T08DPJ 74AXP2T08DP rohs rhf rhf
品质及可靠性免责声明

Series

文档 (6)

文件名称 标题 类型 日期
74AXP2T08 Dual supply, dual 2-input AND gate Data sheet 2021-05-10
AN90029 Pin FMEA for AXPnT family Application note 2021-07-13
Nexperia_document_guide_Logic_translators Nexperia Logic Translators Brochure 2021-04-12
axp2t08 74AXP2T08 IBIS model IBIS model 2016-03-01
Nexperia_document_leaflet_Logic_AXP_technology_portfolio_201904 AXP – Extremely low-power logic technology portfolio Leaflet 2019-04-05
74AXP2T08DP_Nexperia_Product_Reliability 74AXP2T08DP Nexperia Product Reliability Quality document 2022-05-04

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模型

文件名称 标题 类型 日期
axp2t08 74AXP2T08 IBIS model IBIS model 2016-03-01

PCB Symbol, Footprint and 3D Model

Model Name 描述

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The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.

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