74AUP1G97

Low-power configurable multiple function gate

The 74AUP1G97 provides configurable multiple functions. The output state is determined by eight patterns of 3-bit input. The user can choose the logic functions MUX, AND, OR, NAND, NOR, inverter and buffer. All inputs can be connected to VCC or GND.

This device ensures a very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V.

This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.

The 74AUP1G97 has Schmitt trigger inputs making it capable of transforming slowly changing input signals into sharply defined, jitter-free output signals.

The inputs switch at different points for positive and negative-going signals. The difference between the positive voltage VT+ and the negative voltage VT- is defined as the input hysteresis voltage VH.

特性

  • Wide supply voltage range from 0.8 V to 3.6 V
  • High noise immunity
  • ESD protection:
    • HBM JESD22-A114F exceeds 5000 V
    • MM JESD22-A115-A exceeds 200 V
    • CDM JESD22-C101E exceeds 1000 V
  • Low static power consumption; ICC = 0.9 μA (maximum)
  • Latch-up performance exceeds 100 mA per JESD 78 Class II
  • Inputs accept voltages up to 3.6 V
  • Low noise overshoot and undershoot < 10 % of VCC
  • IOFF circuitry provides partial power-down mode operation
  • Multiple package options
  • Specified from -40 °C to +85 °C and -40 °C to +125 °C

参数类型

Type numberProduct statusVCC(A) (V)VCC(B) (V)Logic switching levelsOutput drive capability (mA)tpd (ns)fmax (MHz)No of bitsPower dissipation considerationsTamb (°C)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package name
74AUP1G97GF
NRND
Not for design inCMOS+/- 1.98.7701ultra low-40~1252906.5145XSON6
74AUP1G97GMProduction0.8 - 3.6n.a.CMOS± 1.98.7701ultra low-40~1252906.5145XSON6
74AUP1G97GNProduction0.8 - 3.6n.a.CMOS± 1.98.7701ultra low-40~12527511.7171XSON6
74AUP1G97GSProduction0.8 - 3.6n.a.CMOS± 1.98.7701ultra low-40~12527214.8177XSON6
74AUP1G97GWProduction0.8 - 3.6n.a.CMOS± 1.98.7701ultra low-40~12526438.6153TSSOP6
74AUP1G97GXProduction0.8 - 3.6n.a.CMOS± 1.98.7701ultra low-40~125X2SON6
74AUP1G97UK
NRND
Not for design in0.8 - 3.6n.a.CMOS± 1.98.7701ultra low-40~125WLCSP6

封装

型号封装尺寸版本回流焊/波峰焊包装状态标示可订购的器件编号,(订购码(12NC))
74AUP1G97GF
NRND

XSON6
(SOT891)
SOT891Reel 7" Q1/T1, Q3/T4ActiveaV74AUP1G97GF,132
( 9352 813 35132 )
74AUP1G97GM
XSON6
(SOT886)
SOT886Reel 7" Q1/T1, Q3/T4ActiveaV74AUP1G97GM,132
( 9352 799 63132 )
Reel 7" Q1/T1ActiveaV74AUP1G97GM,115
( 9352 799 63115 )
74AUP1G97GN
XSON6
(SOT1115)
SOT1115Reel 7" Q1/T1, Q3/T4ActiveaV74AUP1G97GN,132
( 9352 917 48132 )
74AUP1G97GS
XSON6
(SOT1202)
SOT1202Reel 7" Q1/T1, Q3/T4ActiveaV74AUP1G97GS,132
( 9352 928 73132 )
74AUP1G97GW
TSSOP6
(SOT363)
SOT363Reel 7" Q3/T4, ReverseActiveaV74AUP1G97GW,125
( 9352 799 62125 )
74AUP1G97GX
X2SON6
(SOT1255)
SOT1255Reel 7" Q2/T3ActiveStandard Marking74AUP1G97GXZ
( 9353 071 23147 )

停产信息

型号可订购的器件编号,(订购码(12NC))最后一次购买日期最后一次交货日期替代产品状态备注
74AUP1G97GX935307123125

品质、可靠性及化学成分

型号可订购的器件编号化学成分RoHS / RHF无铅转换日期EFRIFRMTBF(小时)MSLMSL无铅
74AUP1G97GF
NRND
74AUP1G97GF,13274AUP1G97GFAlways Pb-free11
74AUP1G97GM74AUP1G97GM,13274AUP1G97GMAlways Pb-free0.03.293.04E811
74AUP1G97GM74AUP1G97GM,11574AUP1G97GMAlways Pb-free0.03.293.04E811
74AUP1G97GN74AUP1G97GN,13274AUP1G97GNAlways Pb-free11
74AUP1G97GS74AUP1G97GS,13274AUP1G97GSAlways Pb-free11
74AUP1G97GW74AUP1G97GW,12574AUP1G97GWAlways Pb-free0.03.293.04E811
74AUP1G97GX74AUP1G97GXZ74AUP1G97GXAlways Pb-free11
品质及可靠性免责声明

文档 (28)

文件名称标题类型日期
74AUP1G97Low-power configurable multiple function gateData sheet2017-04-14
AN11052Pin FMEA for AUP familyApplication note2019-01-09
aup1g97aup1g97 IBIS modelIBIS model2015-09-06
Nexperia_document_leaflet_Logic_X2SON_packages_062018X2SON ultra-small 4, 5, 6 & 8-pin leadless packagesLeaflet2018-06-05
Nexperia_document_leaflet_Logic_SingleConfigurableLogic_201812Single configurable logicLeaflet2019-01-04
Nexperia_document_leaflet_Logic_AUP_technology_portfolio_201904Nexperia_document_leaflet_Logic_AUP_technology_portfolio_201904Leaflet2019-04-12
SOT1202_132XSON6; Reel pack for SMD, 7''; Q3/T4 product orientationPacking2020-01-13
MAR_SOT1202MAR_SOT1202 TopmarkTop marking2013-06-03
SOT1202plastic, leadless extremely thin small outline package; 6 terminals; 0.35 mm pitch; 1 mm x 1mm x 0.35 mm bodyOutline drawing2018-11-14
SOT1255_147X2SON6; Reel pack for SMD, 7''; Q2/T3 product orientationPacking2020-02-25
SOT1255plastic, leadless thermal enhanced extremely thin small outline package; 6 terminals; 0.4 mm pitch; 1 mm x 0.8 mm x 0.35 mm bodyOutline drawing2018-11-14
SOT1454-1wafer level chip-scale package, 6 bumpsOutline drawing2018-10-18
SOT1115_132XSON6; Reel pack for SMD, 7''; Q3/T4 product orientationPacking2020-02-14
MAR_SOT1115MAR_SOT1115 TopmarkTop marking2013-06-03
SOT1115plastic, leadless extremely thin small outline package; 6 terminals; 0.3 mm pitch; 0.9 mm x 1 mm x 0.35 mm bodyOutline drawing2018-11-14
SOT891_132XSON6; Reel pack for SMD, 7''; Q3/T4 product orientationPacking2020-02-13
MAR_SOT891MAR_SOT891 TopmarkTop marking2013-06-03
SOT891plastic, leadless extremely thin small outline package; 6 terminals; 0.35 mm pitch; 1 mm x 1 mm x 0.5 mm bodyOutline drawing2018-11-14
SOT363_165TSSOP6; reel pack; reversed product orientation; 12NC ending 165Packing2012-11-20
SOT363_135TSSOP6; Tape reel SMD; standard product orientation 12NC ending 135Packing2012-11-20
MAR_SOT363MAR_SOT363 TopmarkTop marking2013-06-03
SOT363_115TSSOP6; Tape reel SMD; standard product orientation 12NC ending 115Packing2012-11-15
SOT363plastic, surface-mounted package; 6 leads; 0.65 mm pitch; 2.1 mm x 1.25 mm x 0.95 mm bodyOutline drawing2018-11-14
SOT363_125TSSOP6 ; Reel pack for SMD, 7"; Q3/T4 product orientationPacking2020-02-14
SOT886_115XSON6; Reel pack for SMD, 7''; Q1/T1 product orientationPacking2020-02-13
SOT886_132XSON6; Reel pack for SMD, 7''; Q3/T4 product orientationPacking2020-02-13
MAR_SOT886MAR_SOT886 TopmarkTop marking2013-06-03
SOT886plastic, leadless extremely thin small outline package; 6 terminals; 0.5 mm pitch; 1 mm x 1.45 mm x 0.5 mm bodyOutline drawing2018-11-14

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模型

文件名称标题类型日期
aup1g97aup1g97 IBIS modelIBIS model2015-09-06

样品

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