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74ALVCH16501DGG

18-bit universal bus transceiver; 3-state

The 74ALVCH16501 is an 18-bit universal transceiver with bus hold inputs and 3-state outputs. Data flow in each direction is controlled by output enable (OEAB and OEBA), latch enable (LEAB and LEBA), and clock (CPAB and CPBA) inputs. For A-to-B data flow, the device operates in the transparent mode when LEAB is HIGH. When LEAB is LOW, the A data is latched if CPAB is held at a HIGH or LOW logic level. If LEAB is LOW, the A-bus data is stored in the latch/flip-flop on the LOW-to-HIGH transition of CPAB. When OEAB is HIGH, the outputs are active. When OEAB is LOW, the outputs are in the high-impedance state. Data flow for B-to-A is similar to that of A-to-B but uses OEBA, LEBA and CPBA. The output enables are complimentary (OEAB is active HIGH and OEBA is active LOW). This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.

可订购部件

型号 可订购的器件编号 订购代码(12NC) 封装 从经销商处购买
74ALVCH16501DGG 74ALVCH16501DGGY 935262543518 SOT364-1 订单产品

特性

  • Wide supply voltage range from 1.2 V to 3.6 V
  • CMOS low power dissipation
  • Direct interface with TTL levels
  • Current drive ±24 mA at VCC = 3.0 V
  • Universal bus transceiver with D-type latches and D-type flip-flops capable of operating in transparent, latched or clocked mode
  • Bus hold on all data inputs
  • Output drive capability 50 Ω transmission lines at 85 °C
  • 3-state non-inverting outputs for bus-oriented applications
  • Latch-up performance exceeds 100 mA per JESD78 Class II Level B
  • Complies with JEDEC standards:
    • JESD8-7 (1.65 V to 1.95 V)
    • JESD8-5 (2.3 V to 2.7 V)
    • JESD8C (2.7 V to 3.6 V)
  • ESD protection:
    • HBM JESD22-A114F exceeds 2000 V
    • MM JESD22-A115-B exceeds 200 V
  • Specified from -40 °C to +85 °C

目标应用

参数类型

型号Product statusVCC(A) (V)VCC(B) (V)Logic switching levelsOutput drive capability (mA)tpd (ns)Nr of bitsfmax (MHz)Power dissipation considerationsTamb (°C)Rth(j-a) (K/W)Package name
74ALVCH16501DGGProduction1.65 - 3.6n.a.TTL± 242.818150low-40~8593TSSOP56

Package

型号可订购的器件编号,(订购码(12NC))状态标示封装尺寸版本回流焊/波峰焊包装
74ALVCH16501DGG74ALVCH16501DGG,11
( 9352 625 43118 )
DevelopmentALVCH16501
TSSOP56
(SOT364-1)
SOT364-1SSOP-TSSOP-VSO-WAVE
Reel 13" Q1/T1
74ALVCH16501DGGY
( 9352 625 43518 )
ActiveALVCH16501Reel 13" Q1/T1 in Drypack

品质、可靠性及化学成分

型号可订购的器件编号化学成分RoHS / RHFMSLMSL无铅
74ALVCH16501DGG74ALVCH16501DGG,1174ALVCH16501DGG11
74ALVCH16501DGG74ALVCH16501DGGY74ALVCH16501DGG22
品质及可靠性免责声明

文档 (4)

文件名称标题类型日期
74ALVCH1650118-bit universal bus transceiver; 3-stateData sheet2021-11-24
alvch16501alvch16501 IBIS modelIBIS model2013-04-07
74ALVCH16501DGG_Nexperia_Product_Reliability74ALVCH16501DGG Nexperia Product ReliabilityQuality document2022-05-04
SSOP-TSSOP-VSO-WAVEFootprint for wave solderingWave soldering2009-10-08

支持

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模型

文件名称标题类型日期
alvch16501alvch16501 IBIS modelIBIS model2013-04-07

订购、定价与供货

型号Orderable part numberOrdering code (12NC)包装Packing quantity在线购买
74ALVCH16501DGG74ALVCH16501DGGY935262543518Reel 13" Q1/T1 in Drypack- 订单产品

样品

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样品订单通常需要2-4天寄送时间。

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