双极性晶体管

二极管

ESD保护、TVS、滤波和信号调节ESD保护

MOSFET

氮化镓场效应晶体管(GaN FET)

绝缘栅双极晶体管(IGBTs)

模拟和逻辑IC

汽车应用认证产品(AEC-Q100/Q101)

74LV132-Q100

Quad 2-input NAND Schmitt trigger

The 74LV132-Q100 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC132-Q100 and 74HCT132-Q100.

The 74LV132-Q100 contains four 2-input NAND gates which accept standard input signals. These gates are capable of transforming slowly changing input signals into sharply defined, jitter-free output signals.

The gate switches at different points for positive and negative-going signals. The difference between the positive voltage VT+ and the negative voltage VT- is defined as the input hysteresis voltage VH.

This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.

Features and benefits

  • Automotive product qualification in accordance with AEC-Q100 (Grade 1)

    • Specified from -40 °C to +85 °C and from -40 °C to +125 °C

  • Wide operating voltage: 1.0 V to 5.5 V

  • Optimized for low voltage applications: 1.0 V to 3.6 V

  • Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V

  • Typical output ground bounce < 0.8 V at VCC = 3.3 V and Tamb = 25 °C

  • Typical HIGH-level output voltage (VOH) undershoot: > 2 V at VCC = 3.3 V and Tamb = 25 °C

  • ESD protection:

    • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

  • Multiple package options

  • DHVQFN package with Side-Wettable Flanks enabling Automatic Optical Inspection (AOI) of solder joints

Applications

  • Wave and pulse shapers for highly noisy environments

  • Astable multivibrators

  • Monostable multivibrators

参数类型

型号 VCC (V) Logic switching levels Output drive capability (mA) tpd (ns) fmax (MHz) Nr of bits Power dissipation considerations Tamb (°C) Rth(j-a) (K/W) Ψth(j-top) (K/W) Rth(j-c) (K/W) Package name
74LV132BQ-Q100 1.0 - 5.5 TTL ± 12 10 30 4 low -40~125 94 11.2 61 DHVQFN14
74LV132D-Q100 1.0 - 5.5 TTL ± 12 10 30 4 low -40~125 92 9.8 50 SO14
74LV132PW-Q100 1.0 - 5.5 TTL ± 12 10 30 4 low -40~125 130 4.3 55.6 TSSOP14

封装

型号 可订购的器件编号，（订购码(12NC)） 状态 标示 封装 外形图 回流焊/波峰焊 包装
74LV132BQ-Q100 74LV132BQ-Q100X
(935301033115)		 Active LV132 SOT762-1
DHVQFN14
(SOT762-1) 		SOT762-1 SOT762-1_115
74LV132D-Q100 74LV132D-Q100J
(935301031118)		 Active 74LV132D SOT108-1
SO14
(SOT108-1) 		SOT108-1 SO-SOJ-REFLOW
SO-SOJ-WAVE
WAVE_BG-BD-1
SOT108-1_118
74LV132PW-Q100 74LV132PW-Q100J
(935301032118)		 Active LV132 SOT402-1
TSSOP14
(SOT402-1) 		SOT402-1 SSOP-TSSOP-VSO-WAVE
SOT402-1_118

环境信息

型号 可订购的器件编号 化学成分 RoHS RHF指示符
74LV132BQ-Q100 74LV132BQ-Q100X 74LV132BQ-Q100 rohs rhf rhf
74LV132D-Q100 74LV132D-Q100J 74LV132D-Q100 rohs rhf rhf
74LV132PW-Q100 74LV132PW-Q100J 74LV132PW-Q100 rohs rhf rhf
品质及可靠性免责声明

文档 (18)

文件名称 标题 类型 日期
74LV132_Q100 Quad 2-input NAND Schmitt trigger Data sheet 2024-01-30
AN90063 Questions about package outline drawings Application note 2025-06-13
mna407 Block diagram: 74HC132D, 74HC132DB, 74HC132N, 74HC132PW, 74HCT132D, 74HCT132DB, 74HCT132N, 74HCT132PW, 74AHC132BQ, 74AHC132D, 74AHC132PW, 74AHCT132BQ, 74AHCT132D, 74AHCT132PW, 74LV132BQ, 74LV132D, 74LV132DB, 74LV132N, 74LV132PW Block diagram 2009-11-03
SOT762-1 3D model for products with SOT762-1 package Design support 2019-10-03
SOT108-1 3D model for products with SOT108-1 package Design support 2020-01-22
SOT402-1 3D model for products with SOT402-1 package Design support 2023-02-02
Nexperia_package_poster Nexperia package poster Leaflet 2020-05-15
DHVQFN14_SOT762-1_mk plastic, dual in-line compatible thermal enhanced very thin quad flat package; no leads; 14 terminals; 0.5 mm pitch; 2.5 mm x 3 mm x 0.85 mm body Marcom graphics 2017-01-28
SO14_SOT108-1_mk plastic, small outline package; 14 leads; 1.27 mm pitch; 8.65 mm x 3.9 mm x 1.75 mm body Marcom graphics 2017-01-28
TSSOP14_SOT402-1_mk plastic, thin shrink small outline package; 14 leads; 0.65 mm pitch; 5 mm x 4.4 mm x 1.1 mm body Marcom graphics 2017-01-28
SOT762-1 plastic, leadless dual in-line compatible thermal enhanced very thin quad flat package; 14 terminals; 0.5 mm pitch; 2.5 x 3 x 1 mm body Package information 2023-04-05
SOT108-1 plastic, small outline package; 14 leads; 1.27 mm pitch; 8.65 mm x 3.9 mm x 1.75 mm body Package information 2023-11-07
SOT402-1 plastic, thin shrink small outline package; 14 leads; 0.65 mm pitch; 5 mm x 4.4 mm x 1.2 mm body Package information 2023-11-07
SO-SOJ-REFLOW Footprint for reflow soldering Reflow soldering 2009-10-08
lv lv Spice model SPICE model 2013-05-07
SO-SOJ-WAVE Footprint for wave soldering Wave soldering 2009-10-08
WAVE_BG-BD-1 Wave soldering profile Wave soldering 2021-09-08
SSOP-TSSOP-VSO-WAVE Footprint for wave soldering Wave soldering 2009-10-08

支持

如果您需要设计/技术支持，请告知我们并填写 应答表 我们会尽快回复您。

模型

文件名称 标题 类型 日期
SOT762-1 3D model for products with SOT762-1 package Design support 2019-10-03
SOT108-1 3D model for products with SOT108-1 package Design support 2020-01-22
SOT402-1 3D model for products with SOT402-1 package Design support 2023-02-02
lv lv Spice model SPICE model 2013-05-07

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