74AUP1G14GS

Low-power Schmitt trigger inverter

The 74AUP1G14 provides a single inverting Schmitt trigger which accepts standard input signals. It is capable of transforming slowly changing input signals into sharply defined, jitter-free output signals.

This device ensures a very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V.

This device is fully specified for partial Power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.

The inputs switch at different points for positive and negative-going signals. The difference between the positive voltage VT+ and the negative voltage VT− is defined as the input hysteresis voltage VH.

特性

  • Wide supply voltage range from 0.8 V to 3.6 V
  • High noise immunity
  • ESD protection:
    • HBM: ANSI/ESDA/JEDEC JS-001 Class 3A exceeds 5000 V
    • CDM: ANSI/ESDA/JEDEC JS-002 Class C3 exceeds 1000 V
    • MM: JESD22-A115-A exceeds 200 V
  • Low static power consumption; ICC = 0.9 μA (maximum)
  • Latch-up performance exceeds 100 mA per JESD 78 Class II
  • Inputs accept voltages up to 3.6 V
  • Low noise overshoot and undershoot < 10 % of VCC
  • IOFF circuitry provides partial Power-down mode operation
  • Multiple package options
  • Specified from -40 °C to +85 °C and -40 °C to +125 °C

目标应用

  • Wave and pulse shaper
  • Astable multivibrator
  • Monostable multivibrator

参数类型

型号Product statusVCC (V)Logic switching levelsOutput drive capability (mA)fmax (MHz)No of bitsPower dissipation considerationsTamb (Cel)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package name
74AUP1G14GSProduction1.1 - 3.6CMOS+/- 1.9701ultra low-40~12532128.7215XSON6

Package

型号封装尺寸版本回流焊/波峰焊包装状态标示可订购的器件编号,(订购码(12NC))
74AUP1G14GS
XSON6
(SOT1202)
SOT1202Reel 7" Q1/T1, Q3/T4ActivepF74AUP1G14GS,132
( 9352 928 49132 )

品质、可靠性及化学成分

型号可订购的器件编号化学成分RoHS / RHF无铅转换日期MSLMSL无铅
74AUP1G14GS74AUP1G14GS,13274AUP1G14GSAlways Pb-free11
品质及可靠性免责声明

文档 (7)

文件名称标题类型日期
74AUP1G14Low-power Schmitt trigger inverterData sheet2018-06-08
AN11052Pin FMEA for AUP familyApplication note2011-05-06
AN10156Sorting through the low voltage logic mazeApplication note2013-03-13
75017458NXP ultra-low-power CMOS logic 74AUP1G/2G/3Gxxx: Advanced, ultra-low-power CMOS logicBrochure2014-10-12
aup1g1474AUP1G14 IBIS modelIBIS model2018-05-25
SOT1202_132Reversed product orientation 12NC ending 132Packing2013-04-04
SOT1202plastic, leadless extremely thin small outline package; 6 terminals; 0.55 mm pitch; 1 mm x 1mm x 0.35 mm bodyOutline drawing2018-06-04

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模型

文件名称标题类型日期
aup1g1474AUP1G14 IBIS modelIBIS model2018-05-25

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