74AUP2G126GF NRND

Low-power dual buffer/line driver; 3-state

The 74AUP2G126 provides the dual non-inverting buffer/line driver with 3-state output. The 3-state output is controlled by the output enable input (nOE). A LOW level at pin nOE causes the output to assume a high-impedance OFF-state. This device has the input-disable feature, which allows floating input signals. The inputs are disabled when the output enable input nOE is LOW.

Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V. This device ensures a very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V.

This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing a damaging backflow current through the device when it is powered down.

Not recommended for new designs (NRND), 单击此处 for the alternative product.

特性

  • Wide supply voltage range from 0.8 V to 3.6 V
  • High noise immunity
  • Complies with JEDEC standards:
    • JESD8-12 (0.8 V to 1.3 V)
    • JESD8-11 (0.9 V to 1.65 V)
    • JESD8-7 (1.2 V to 1.95 V)
    • JESD8-5 (1.8 V to 2.7 V)
    • JESD8-B (2.7 V to 3.6 V)
  • ESD protection:
    • HBM JESD22-A114F Class 3A exceeds 5000 V
    • MM JESD22-A115-A exceeds 200 V
    • CDM JESD22-C101E exceeds 1000 V
  • Low static power consumption; ICC = 0.9 μA (maximum)
  • Latch-up performance exceeds 100 mA per JESD78 Class II
  • Inputs accept voltages up to 3.6 V
  • Low noise overshoot and undershoot < 10 % of VCC
  • Input-disable feature allows floating input conditions
  • IOFF circuitry provides partial Power-down mode operation
  • Multiple package options
  • Specified from –40 ℃ to +85 ℃ and –40 ℃ to +125 ℃

目标应用

参数类型

型号Product statusVCC (V)Logic switching levelsOutput drive capability (mA)fmax (MHz)No of bitsPower dissipation considerationsTamb (Cel)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package name
74AUP2G126GF
NRND
Not for design in1.1 - 3.6CMOS+/- 1.9702ultra low-40~1252542.1124XSON8

Package

型号封装尺寸版本回流焊/波峰焊包装状态标示可订购的器件编号,(订购码(12NC))
74AUP2G126GF
NRND

XSON8
(SOT1089)
SOT1089Reel 7" Q1/T1ActivepN74AUP2G126GF,115
( 9352 914 76115 )

品质、可靠性及化学成分

型号可订购的器件编号化学成分RoHS / RHF无铅转换日期MSLMSL无铅
74AUP2G126GF
NRND
74AUP2G126GF,11574AUP2G126GFAlways Pb-free11
品质及可靠性免责声明

文档 (8)

文件名称标题类型日期
74AUP2G126Low-power dual buffer/line driver; 3-stateData sheet2017-07-14
AN11052Pin FMEA for AUP familyApplication note2011-05-06
AN10156Sorting through the low voltage logic mazeApplication note2013-03-13
75017458NXP ultra-low-power CMOS logic 74AUP1G/2G/3Gxxx: Advanced, ultra-low-power CMOS logicBrochure2014-10-12
aup2g126aup2g126 IBIS modelIBIS model2013-04-07
75017285Logic selection guide 2016Selection guide2015-01-07
SOT1089_115XSON8; Reel pack; SMD, 7" Q1/T1 Standard product orientation Orderable part number ending ,115 or X Ordering code (12NC) ending 115Packing2013-04-23
SOT1089plastic, leadless extremely thin small outline package; 8 terminals; 0.55 mm pitch; 1.35 mm x 1 mm x 0.5 mm bodyOutline drawing2018-06-04

支持

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模型

文件名称标题类型日期
aup2g126aup2g126 IBIS modelIBIS model2013-04-07

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