×

74AUP1G175

Low-power D-type flip-flop with reset; positive-edge trigger

The 74AUP1G175 is a single positive edge triggered D-type flip-flop with individual data (D), clock (CP), master reset (MR) inputs, and Q output. The D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition will be stored in the flip-flop and appear at the Q output. A LOW on MR causes the flip-flop and output to be reset to LOW. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.

特性

  • Wide supply voltage range from 0.8 V to 3.6 V

  • High noise immunity

  • CMOS low power dissipation

  • Complies with JEDEC standards:

    • JESD8-12 (0.8 V to 1.3 V)

    • JESD8-11 (0.9 V to 1.65 V)

    • JESD8-7 (1.2 V to 1.95 V)

    • JESD8-5 (1.8 V to 2.7 V)

    • JESD8C (2.7 V to 3.6 V)

  • Low static power consumption; ICC = 0.9 μA (maximum)

  • Latch-up performance exceeds 100 mA per JESD 78 Class II

  • Overvoltage tolerant inputs to 3.6 V

  • Low noise overshoot and undershoot < 10 % of VCC

  • IOFF circuitry provides partial Power-down mode operation

  • Multiple package options

  • ESD protection:

    • HBM: ANSI/ESDA/JEDEC JS-001 class 3A exceeds 5000 V

    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

  • Specified from -40 °C to +85 °C and -40 °C to +125 °C

参数类型

Type numberProduct statusVCC (V)Logic switching levelsOutput drive capability (mA)tpd (ns)fmax (MHz)Power dissipation considerationsTamb (°C)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package name
74AUP1G175GMProduction0.8 - 3.6CMOS± 1.97.470ultra low-40~1252906.5145XSON6
74AUP1G175GNProduction0.8 - 3.6CMOS± 1.97.470ultra low-40~12527511.7171XSON6
74AUP1G175GSProduction0.8 - 3.6CMOS± 1.97.470ultra low-40~12527214.8177XSON6
74AUP1G175GWProduction0.8 - 3.6CMOS± 1.97.470ultra low-40~12526438.6153TSSOP6

封装

型号封装尺寸版本回流焊/波峰焊包装状态标示可订购的器件编号,(订购码(12NC))
74AUP1G175GM
XSON6
(SOT886)
SOT886REFLOW_BG-BD-1
SOT886_115ActiveaT74AUP1G175GM,115
( 9352 800 04115 )
SOT886_132ActiveaT74AUP1G175GM,132
( 9352 800 04132 )
74AUP1G175GN
XSON6
(SOT1115)
SOT1115REFLOW_BG-BD-1
SOT1115_132ActiveaT74AUP1G175GN,132
( 9352 917 28132 )
74AUP1G175GS
XSON6
(SOT1202)
SOT1202REFLOW_BG-BD-1
SOT1202_132ActiveaT74AUP1G175GS,132
( 9352 928 53132 )
74AUP1G175GW
TSSOP6
(SOT363-2)
SOT363-2SOT363-2_125ActiveaT74AUP1G175GW,125
( 9352 800 03125 )

停产信息

型号可订购的器件编号,(订购码(12NC))最后一次购买日期最后一次交货日期替代产品状态备注
74AUP1G175GM935280004114

环境信息

型号可订购的器件编号化学成分RoHSRHF指示符无铅转换日期
74AUP1G175GM74AUP1G175GM,11574AUP1G175GMAlways Pb-free
74AUP1G175GM74AUP1G175GM,13274AUP1G175GMAlways Pb-free
74AUP1G175GN74AUP1G175GN,13274AUP1G175GNAlways Pb-free
74AUP1G175GS74AUP1G175GS,13274AUP1G175GSAlways Pb-free
74AUP1G175GW74AUP1G175GW,12574AUP1G175GWAlways Pb-free
品质及可靠性免责声明

文档 (16)

文件名称标题类型日期
74AUP1G175Low-power D-type flip-flop with reset; positive-edge triggerData sheet2023-07-13
AN10161PicoGate Logic footprintsApplication note2002-10-29
AN11052Pin FMEA for AUP familyApplication note2019-01-09
aup1g175aup1g175 IBIS modelIBIS model2014-12-21
Nexperia_document_leaflet_Logic_AUP_technology_portfolio_201904Nexperia_document_leaflet_Logic_AUP_technology_portfolio_201904Leaflet2019-04-12
Nexperia_Selection_guide_2023Nexperia Selection Guide 2023Selection guide2023-05-10
REFLOW_BG-BD-1Reflow soldering profileReflow soldering2021-04-06
MAR_SOT1202MAR_SOT1202 TopmarkTop marking2013-06-03
SOT1202plastic, leadless extremely thin small outline package; 6 terminals; 0.35 mm pitch; 1 mm x 1mm x 0.35 mm bodyPackage information2022-06-01
SOT363-2plastic thin shrink small outline package; 6 leads; body width 1.25 mmPackage information2022-11-21
REFLOW_BG-BD-1Reflow soldering profileReflow soldering2021-04-06
MAR_SOT1115MAR_SOT1115 TopmarkTop marking2013-06-03
SOT1115plastic, leadless extremely thin small outline package; 6 terminals; 0.3 mm pitch; 0.9 mm x 1 mm x 0.35 mm bodyPackage information2022-05-27
MAR_SOT886MAR_SOT886 TopmarkTop marking2013-06-03
SOT886plastic, leadless extremely thin small outline package; 6 terminals; 0.5 mm pitch; 1 mm x 1.45 mm x 0.5 mm bodyPackage information2022-06-01
REFLOW_BG-BD-1Reflow soldering profileReflow soldering2021-04-06

支持

如果您需要设计/技术支持,请告知我们并填写 应答表, 我们会尽快回复您。

模型

文件名称标题类型日期
aup1g175aup1g175 IBIS modelIBIS model2014-12-21

样品

安世半导体客户可通过我们的销售机构或直接通过在线样品商店订购样品: https://extranet.nexperia.com.

样品订单通常需要2-4天寄送时间。

如果您尚未取得安世半导体的直接采购帐号,我们的全球与区域经销网络可以协助您取得样品。