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74AUP1G80

Low-power D-type flip-flop; positive-edge trigger

The 74AUP1G80 is a single positive-edge triggered D-type flip-flop. Data at the D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition will be stored in the flip-flop and its complement will appear at the Q output. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.

特性

  • Wide supply voltage range from 0.8 V to 3.6 V

  • CMOS low power dissipation

  • High noise immunity

  • Complies with JEDEC standards:

    • JESD8-12 (0.8 V to 1.3 V)

    • JESD8-11 (0.9 V to 1.65 V)

    • JESD8-7 (1.65 V to 1.95 V)

    • JESD8-5 (2.3 V to 2.7 V)

    • JESD8C (2.7 V to 3.6 V)

  • Low static power consumption; ICC = 0.9 μA (maximum)

  • Latch-up performance exceeds 100 mA per JESD 78 Class II

  • Overvoltage tolerant inputs to 3.6 V

  • Low noise overshoot and undershoot < 10 % of VCC

  • IOFF circuitry provides partial Power-down mode operation

  • ESD protection:

    • HBM: ANSI/ESDA/JEDEC JS-001 class 3A exceeds 5000 V

    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

  • Multiple package options

  • Specified from -40 °C to +85 °C and -40 °C to +125 °C

参数类型

Type numberProduct statusVCC (V)Logic switching levelsOutput drive capability (mA)tpd (ns)fmax (MHz)Power dissipation considerationsTamb (°C)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package name
74AUP1G80GMProduction0.8 - 3.6CMOS± 1.99.1400ultra low-40~1253117.7157XSON6
74AUP1G80GNProduction0.8 - 3.6CMOS± 1.99.1400ultra low-40~12533422.6207XSON6
74AUP1G80GSProduction0.8 - 3.6CMOS± 1.99.1400ultra low-40~12532128.7215XSON6
74AUP1G80GWProduction0.8 - 3.6CMOS± 1.99.1400ultra low-40~12530979.2179TSSOP5
74AUP1G80GXProduction0.8 - 3.6CMOS± 1.99.1400ultra low-40~12532290.7191X2SON5

封装

型号封装尺寸版本回流焊/波峰焊包装状态标示可订购的器件编号，（订购码(12NC)）
74AUP1G80GM
XSON6
(SOT886) 		SOT886REFLOW_BG-BD-1
SOT886_132ActivepT74AUP1G80GM,132
( 9352 790 51132 )
SOT886_115ActivepT74AUP1G80GM,115
( 9352 790 51115 )
74AUP1G80GN
XSON6
(SOT1115) 		SOT1115REFLOW_BG-BD-1
SOT1115_132ActivepT74AUP1G80GN,132
( 9352 917 46132 )
74AUP1G80GS
XSON6
(SOT1202) 		SOT1202REFLOW_BG-BD-1
SOT1202_132ActivepT74AUP1G80GS,132
( 9352 928 71132 )
74AUP1G80GW
TSSOP5
(SOT353-1) 		SOT353-1WAVE_BG-BD-1
SOT353-1_125ActivepT74AUP1G80GW,125
( 9352 790 49125 )
74AUP1G80GX
X2SON5
(SOT1226-3) 		SOT1226-3SOT1226-3_125ActivepT74AUP1G80GX,125
( 9352 983 66125 )

环境信息

型号可订购的器件编号化学成分RoHSRHF指示符无铅转换日期
74AUP1G80GM74AUP1G80GM,13274AUP1G80GMAlways Pb-free
74AUP1G80GM74AUP1G80GM,11574AUP1G80GMAlways Pb-free
74AUP1G80GN74AUP1G80GN,13274AUP1G80GNAlways Pb-free
74AUP1G80GS74AUP1G80GS,13274AUP1G80GSAlways Pb-free
74AUP1G80GW74AUP1G80GW,12574AUP1G80GWAlways Pb-free
74AUP1G80GX74AUP1G80GX,12574AUP1G80GXAlways Pb-free
品质及可靠性免责声明

文档 (19)

文件名称标题类型日期
74AUP1G80Low-power D-type flip-flop; positive-edge triggerData sheet2023-07-24
AN10161PicoGate Logic footprintsApplication note2002-10-29
AN11052Pin FMEA for AUP familyApplication note2019-01-09
aup1g8074AUP1G80 IBIS modelIBIS model2014-12-14
Nexperia_document_leaflet_Logic_X2SON_packages_062018X2SON ultra-small 4, 5, 6 & 8-pin leadless packagesLeaflet2018-06-05
Nexperia_document_leaflet_Logic_AUP_technology_portfolio_201904Nexperia_document_leaflet_Logic_AUP_technology_portfolio_201904Leaflet2019-04-12
Nexperia_Selection_guide_2023Nexperia Selection Guide 2023Selection guide2023-05-10
MAR_SOT1202MAR_SOT1202 TopmarkTop marking2013-06-03
SOT1202plastic, leadless extremely thin small outline package; 6 terminals; 0.35 mm pitch; 1 mm x 1mm x 0.35 mm bodyPackage information2022-06-01
REFLOW_BG-BD-1Reflow soldering profileReflow soldering2021-04-06
WAVE_BG-BD-1Wave soldering profileWave soldering2021-09-08
SOT353-1plastic thin shrink small outline package; 5 leads; body width 1.25 mmPackage information2022-11-15
MAR_SOT1115MAR_SOT1115 TopmarkTop marking2013-06-03
SOT1115plastic, leadless extremely thin small outline package; 6 terminals; 0.3 mm pitch; 0.9 mm x 1 mm x 0.35 mm bodyPackage information2022-05-27
REFLOW_BG-BD-1Reflow soldering profileReflow soldering2021-04-06
MAR_SOT886MAR_SOT886 TopmarkTop marking2013-06-03
SOT886plastic, leadless extremely thin small outline package; 6 terminals; 0.5 mm pitch; 1 mm x 1.45 mm x 0.5 mm bodyPackage information2022-06-01
REFLOW_BG-BD-1Reflow soldering profileReflow soldering2021-04-06
SOT1226-3plastic thermal enhanced extremely thin small outline package; no leads;5 terminals; body 0.8 x 0.8 x 0.32 mmPackage information2020-08-27

支持

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模型

文件名称标题类型日期
aup1g8074AUP1G80 IBIS modelIBIS model2014-12-14

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