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74LVC573A

Octal D-type transparent latch with 5 V tolerant inputs/outputs; 3-state

The 74LVC573A is an 8-bit D-type transparent latch with 3-state outputs. The device features latch enable (LE) and output enable (OE) inputs. When LE is HIGH, data at the inputs enter the latches. In this condition the latches are transparent, a latch output will change each time its corresponding D-input changes. When LE is LOW the latches store the information that was present at the inputs a set-up time preceding the HIGH-to-LOW transition of LE. A HIGH on OE causes the outputs to assume a high-impedance OFF-state. Operation of the OE input does not affect the state of the latches. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments.

Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.

This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.

特性

  • Wide supply voltage range from 1.2 to 3.6 V

  • Overvoltage tolerant inputs to 5.5 V

  • CMOS low power consumption

  • Direct interface with TTL levels

  • IOFF circuitry provides partial Power-down mode operation

  • High-impedance when VCC = 0 V

  • Flow-through pinout architecture

  • Complies with JEDEC standard:

    • JESD8-7A (1.65 V to 1.95 V)

    • JESD8-5A (2.3 V to 2.7 V)

    • JESD8-C/JESD36 (2.7 V to 3.6 V)

  • ESD protection:

    • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

  • Specified from -40 °C to +85 °C and -40 °C to +125 °C

参数类型

Type numberProduct statusVCC (V)Logic switching levelsOutput drive capability (mA)tpd (ns)Power dissipation considerationsTamb (°C)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package name
74LVC573ABQProduction1.2 - 3.6TTL± 243.4low-40~125799.550DHVQFN20
74LVC573ADProduction1.2 - 3.6TTL± 243.4low-40~1258527.661SO20
74LVC573APWProduction1.2 - 3.6TTL± 243.4low-40~1251014.745TSSOP20

封装

型号封装尺寸版本回流焊/波峰焊包装状态标示可订购的器件编号，（订购码(12NC)）
74LVC573ABQ
DHVQFN20
(SOT764-1) 		SOT764-1SOT764-1_115ActiveLVC573A74LVC573ABQ,115
( 9352 735 07115 )
74LVC573AD
SO20
(SOT163-1) 		SOT163-1WAVE_BG-BD-1
SOT163-1_118Active74LVC573AD74LVC573AD,118
( 9352 190 00118 )
74LVC573APW
TSSOP20
(SOT360-1) 		SOT360-1SSOP-TSSOP-VSO-WAVE
SOT360-1_118ActiveLVC573A LVC573A Standard Procedure Standard Procedure74LVC573APW,118
( 9352 190 20118 )

下表中的版本已停产。参见表 停产信息 了解更多信息。

型号封装尺寸版本回流焊/波峰焊包装状态标示可订购的器件编号，（订购码(12NC)）
74LVC573AD
SO20
(SOT163-1) 		SOT163-1WAVE_BG-BD-1
SOT163-1_112Withdrawn / End-of-life74LVC573AD74LVC573AD,112
( 9352 190 00112 )
74LVC573APW
TSSOP20
(SOT360-1) 		SOT360-1SSOP-TSSOP-VSO-WAVE
SOT360-1_112Withdrawn / End-of-lifeLVC573A LVC573A Standard Procedure Standard Procedure74LVC573APW,112
( 9352 190 20112 )

停产信息

型号可订购的器件编号，（订购码(12NC)）最后一次购买日期最后一次交货日期替代产品状态备注
74LVC573AD9352190001122021-12-312022-06-3074LVC573AD
    74LVC573APW9352190201122021-12-312022-06-3074LVC573APW

      环境信息

      型号可订购的器件编号化学成分RoHSRHF指示符无铅转换日期
      74LVC573ABQ74LVC573ABQ,11574LVC573ABQAlways Pb-free
      74LVC573AD74LVC573AD,11874LVC573ADweek 30, 2004
      74LVC573APW74LVC573APW,11874LVC573APWweek 7, 2005

      下表中的版本已停产。参见表 停产信息 了解更多信息。

      型号可订购的器件编号化学成分RoHSRHF指示符无铅转换日期
      74LVC573AD74LVC573AD,11274LVC573ADweek 30, 2004
      74LVC573APW74LVC573APW,11274LVC573APWweek 7, 2005
      品质及可靠性免责声明

      文档 (11)

      文件名称标题类型日期
      74LVC573AOctal D-type transparent latch with 5 V tolerant inputs/outputs; 3-stateData sheet2023-09-07
      AN263Power considerations when using CMOS and BiCMOS logic devicesApplication note2023-02-07
      AN11009Pin FMEA for LVC familyApplication note2019-01-09
      lvc573alvc573a IBIS modelIBIS model2013-04-07
      Nexperia_Selection_guide_2023Nexperia Selection Guide 2023Selection guide2023-05-10
      lvclvc Spice modelSPICE model2013-05-06
      SOT764-1plastic, leadless dual in-line compatible thermal enhanced very thin quad flat package; 20 terminals; 0.5 mm pitch; 4.5 mm x 2.5 mm x 1 mm bodyPackage information2022-06-21
      SSOP-TSSOP-VSO-WAVEFootprint for wave solderingWave soldering2009-10-08
      SOT360-1plastic, thin shrink small outline package; 20 leads; 0.65 mm pitch; 6.5 mm x 4.4 mm x 1.1 mm bodyPackage information2022-06-21
      SOT163-1plastic, small outline package; 20 leads; 1.27 mm pitch; 12.8 mm x 7.5 mm x 2.65 mm bodyPackage information2022-06-20
      WAVE_BG-BD-1Wave soldering profileWave soldering2021-09-08

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      模型

      文件名称标题类型日期
      lvc573alvc573a IBIS modelIBIS model2013-04-07
      lvclvc Spice modelSPICE model2013-05-06

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