双极性晶体管

二极管

ESD保护、TVS、滤波和信号调节ESD保护

MOSFET

SiC power devices

氮化镓场效应晶体管(GaN FET)

绝缘栅双极晶体管(IGBTs)

模拟和逻辑IC

汽车应用认证产品(AEC-Q100/Q101)
N74F374D

N74F374D End of life

Octal D flip-flop (3-State)

The 74F374 is an 8-bit edge triggered register coupled to eight 3-State output buffers. The two sections of the device are controlled independently by clock (CP) and output enable (OE) control gates.

The register is fully edge triggered. The state of the D input, one set-up time before the LOW-to-HIGH clock transition is transferred to the corresponding flip-flop’s Q output.

The 3-State output buffers are designed to drive heavily loaded 3-State buses, MOS memories, or MOS microprocessors.

The active-LOW output enable (OE) controls all eight 3-State buffers independent of the register operation. When OE is LOW, the data in the register appears at the outputs. When OE is HIGH, the outputs are in high impedance “off” state, which means they will neither drive nor load the bus.
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  • 支持
  • 交互式数据手册

产品细节

Features and benefits

  • 8-bit positive edge triggered register
  • 3-State outputs glitch free during power-up and power-down
  • Common 3-State output register
  • Independent register and 3-State buffer operation
  • SSOP Type II Package

Applications

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    More information

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    Longevity

    The Nexperia Longevity Program is aimed to provide our customers information from time to time about the expected time that our products can be ordered. The NLP is reviewed and updated regularly by our Executive Management Team. View our longevity program here.

    交互式数据手册

    How does it work?

    The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.

    交互式数据手册