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74LVT16374A; 74LVTH16374A

3.3 V 16-bit edge-triggered D-type flip-flop; 3-state

The 74LVT16374A; 74LVTH16374A is a 16-bit edge-triggered D-type flip-flop with 3-state outputs. The device can be used as two 8-bit flip-flops or one 16-bit flip-flop. The device features two clocks (1CP and 2CP) and two output enables (1OE and 2OE), each controlling 8-bits. The flip-flops will store the state of their individual D-inputs that meet the set-up and hold time requirements on the LOW-to-HIGH clock (nCP) transition. A HIGH on nOE causes the outputs to assume a high-impedance OFF-state. Operation of the nOE input does not affect the state of the flip-flops.

特性

  • 16-bit edge-triggered flip-flop

  • 3-state buffers

  • Output capability: +64 mA and -32 mA

  • Wide supply voltage range from 2.7 to 3.6 V

  • Overvoltage tolerant inputs to 5.5 V

  • BiCMOS high speed and output drive

  • Direct interface with TTL levels

  • Input and output interface capability to systems at 5 V supply

  • Bus-hold data inputs eliminate the need for external pull-up resistors to hold unused inputs. (74LVTH16374A only)

  • Live insertion and extraction permitted

  • Power-up reset

  • Power-up 3-state

  • No bus current loading when output is tied to 5 V bus

  • IOFF circuitry provides partial Power-down mode operation

  • Latch-up performance exceeds 500 mA per JESD 78 Class II Level B

  • Complies with JEDEC standard JESD8C (2.7 V to 3.6 V)

  • ESD protection:

    • HBM JESD22-A114F exceeds 2000 V

    • MM JESD22-A115-A exceeds 200 V

  • Specified from -40 °C to 85 °C

参数类型

Type numberProduct statusVCC (V)Logic switching levelsOutput drive capability (mA)tpd (ns)fmax (MHz)Power dissipation considerationsTamb (°C)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package name
74LVT16374ADGGProduction2.7 - 3.6TTL-32/+643.0150medium-40~85821.835TSSOP48
74LVTH16374ADGGProduction2.7 - 3.6TTL-32/+643.0150medium-40~85821.835TSSOP48

封装

型号封装尺寸版本回流焊/波峰焊包装状态标示可订购的器件编号，（订购码(12NC)）
74LVT16374ADGG
TSSOP48
(SOT362-1) 		SOT362-1SSOP-TSSOP-VSO-WAVE
SOT362-1_118ActiveLVT16374A Standard Procedure Standard Procedure LVT16374A74LVT16374ADGG,118
( 9352 030 10118 )
74LVTH16374ADGG
TSSOP48
(SOT362-1) 		SOT362-1SSOP-TSSOP-VSO-WAVE
SOT362-1_118ActiveLVTH16374A74LVTH16374ADGG,18
( 9352 892 65118 )

停产信息

型号可订购的器件编号，（订购码(12NC)）最后一次购买日期最后一次交货日期替代产品状态备注
74LVT16374ADGG935203010518
74LVT16374ADGG935203010512
74LVT16374ADGG9352030101122021-06-302021-12-3174LVT16374ADGG
    74LVTH16374ADGG935289265518
    74LVTH16374ADGG935289265512
    74LVTH16374ADGG935289265112

    环境信息

    型号可订购的器件编号化学成分RoHSRHF指示符无铅转换日期
    74LVT16374ADGG74LVT16374ADGG,11874LVT16374ADGGAlways Pb-free
    74LVTH16374ADGG74LVTH16374ADGG,1874LVTH16374ADGGAlways Pb-free
    品质及可靠性免责声明

    文档 (4)

    文件名称标题类型日期
    74LVT_LVTH16374A3.3 V 16-bit edge-triggered D-type flip-flop; 3-stateData sheet2024-03-21
    lvt16374alvt16374a IBIS modelIBIS model2013-04-07
    SSOP-TSSOP-VSO-WAVEFootprint for wave solderingWave soldering2009-10-08
    SOT362-1plastic thin shrink small outline package; 48 leads; body width 6.1 mmPackage information2024-01-05

    支持

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    模型

    文件名称标题类型日期
    lvt16374alvt16374a IBIS modelIBIS model2013-04-07

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