74HC161D-Q100

Presettable synchronous 4-bit binary counter; asynchronous reset

The 74HC161-Q100 is a synchronous preset table binary counter with an internal look-head carry. Synchronous operation is provided by having all flip-flops clocked simultaneously on the positive-going edge of the clock (CP). The outputs (Q0 to Q3) of the counters may be preset HIGH or LOW. A LOW at the parallel enable input (PE) disables the counting action and causes the data at the data inputs (D0 to D3) to be loaded into the counter on the positive-going edge of the clock. Preset takes place regardless of the levels at count enable inputs (CEP and CET). A LOW at the master reset input (MR) sets Q0 to Q3 LOW regardless of the levels at input pins CP, PE, CET and CEP (thus providing an asynchronous clear function). The look-ahead carry simplifies serial cascading of the counters. Both CEP and CET must be HIGH to count. The CET input is fed forward to enable the terminal count output (TC). The TC output thus enabled will produce a HIGH output pulse of a duration approximately equal to a HIGH output of Q0. This pulse can be used to enable the next cascaded stage. The maximum clock frequency for the cascaded counters is determined by the CP to TC propagation delay and CEP to CP set-up time, according to the following formula:

f(max) = 1 /( t P(max) (CPtoTC) + t SU (CEPtoCP) ).

Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.

特性

  • Complies with JEDEC standard no. 7A
  • Input levels:
    • For 74HC161-Q100: CMOS level
  • Synchronous counting and loading
  • 2 count enable inputs for n-bit cascading
  • Asynchronous reset
  • Positive-edge triggered clock
  • ESD protection:
    • HBM JESD22-A114F exceeds 2000 V
    • MM JESD22-A115-A exceeds 200 V
  • Specified from -40 °C to +85 °C and -40 °C to +125 °C

目标应用

参数类型

型号Product statusVCC (V)Output drive capability (mA)Logic switching levelstpd (ns)fmax (MHz)Power dissipation considerationsTamb (Cel)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package name
74HC161D-Q100Production2.0 - 6.0+/- 5.2CMOS1948low-40~125836.041SO16

Package

型号封装尺寸版本回流焊/波峰焊包装状态标示可订购的器件编号,(订购码(12NC))
74HC161D-Q100
SO16
(SOT109-1)
SOT109-1SO-SOJ-REFLOW
SO-SOJ-WAVE
Reel 13" Q1/T1Active74HC161D74HC161D-Q100J
( 9353 044 96118 )

品质、可靠性及化学成分

型号可订购的器件编号化学成分RoHS / RHF无铅转换日期MSLMSL无铅
74HC161D-Q10074HC161D-Q100J74HC161D-Q100Always Pb-free11
品质及可靠性免责声明

文档 (8)

文件名称标题类型日期
74HC161_Q100Presettable synchronous 4-bit binary counter; asynchronous resetData sheet2018-10-04
AN11044Pin FMEA 74HC/74HCT familyApplication note2011-03-16
AN252Live Insertion Aspects of Philips Logic FamiliesApplication note2013-03-13
HCT_USER_GUIDEHC/T User GuideUser manual1997-10-31
SO-SOJ-REFLOWFootprint for reflow solderingReflow soldering2009-10-08
SO-SOJ-WAVEFootprint for wave solderingWave soldering2009-10-08
SOT109-1_118SO16; Reel pack; SMD, 13" Q1/T1 Standard product orientation Orderable part number ending ,118 or J Ordering code (12NC) ending 118Packing2013-04-24
SOT109-1plastic, small outline package; 16 leads; 1.27 mm pitch; 9.9 mm x 3.9 mm x 1.35 mm bodyOutline drawing2018-10-18

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