The HEF4060B-Q100 is a 14-stage ripple-carry binary counter/divider and oscillator. It has three oscillator terminals (RS, REXT and CEXT) and ten buffered outputs (Q3 to Q9 and Q11 to Q13). It also has an overriding asynchronous master reset input (MR).
The oscillator configuration allows the design of either RC or crystal oscillator circuits. An external clock signal at input RS can replace the oscillator. The Schmitt trigger action of the clock makes it highly tolerant to slower clock rise and fall times. The counter advances on the negative-going transition of RS. A HIGH level on MR resets the counter (Q3 to Q9 and Q11 to Q13 = LOW), independent of other input conditions.
It operates over a recommended VDD power supply range of 3 V to 15 V referenced to VSS (usually ground). Unused inputs must be connected to VDD, VSS, or another input.
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 3) and is suitable for use in automotive applications.