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74LVC573APW-Q100

Octal D-type transparent latch with 5 V tolerantinputs/outputs; 3-state

The 74LVC573A-Q100 is an 8-bit D-type transparent latch with 3-state outputs. The device features latch enable (LE) and output enable (OE) inputs. When LE is HIGH, data at the inputs enter the latches. In this condition the latches are transparent, a latch output will change each time its corresponding D-input changes. When LE is LOW the latches store the information that was present at the inputs a set-up time preceding the HIGH-to-LOW transition of LE. A HIGH on OE causes the outputs to assume a high-impedance OFF-state. Operation of the OE input does not affect the state of the latches. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments.

Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.

This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.

This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.

Features and benefits

  • Automotive product qualification in accordance with AEC-Q100 (Grade 1)

    • Specified from -40 °C to +85 °C and from -40 °C to +125 °C

  • Wide supply voltage range from 1.2 to 3.6 V

  • Overvoltage tolerant inputs to 5.5 V

  • CMOS low power consumption

  • Direct interface with TTL levels

  • IOFF circuitry provides partial Power-down mode operation

  • High-impedance when VCC = 0 V

  • Flow-through pinout architecture

  • Complies with JEDEC standard:

    • JESD8-7A (1.65 V to 1.95 V)

    • JESD8-5A (2.3 V to 2.7 V)

    • JESD8-C/JESD36 (2.7 V to 3.6 V)

  • ESD protection:

    • MIL-STD-883, method 3015 exceeds 2000 V

    • HBM JESD22-A114F exceeds 2000 V

    • MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω)

  • DHVQFN package with Side-Wettable Flanks enabling Automatic Optical Inspection (AOI) of solder joints

参数类型

型号 Product status VCC (V) Logic switching levels Output drive capability (mA) tpd (ns) fmax (MHz) Power dissipation considerations Tamb (°C) Rth(j-a) (K/W) Ψth(j-top) (K/W) Rth(j-c) (K/W) Package name
74LVC573APW-Q100 Production 1.2 - 3.6 TTL ± 24 3.4 8 low -40~125 101 4.7 45 TSSOP20

PCB Symbol, Footprint and 3D Model

Model Name 描述

封装

型号 可订购的器件编号,(订购码(12NC)) 状态 标示 封装 外形图 回流焊/波峰焊 包装
74LVC573APW-Q100 74LVC573APW-Q100J
(935300238118)
Active LVC573A SOT360-1
TSSOP20
(SOT360-1)
SOT360-1 SSOP-TSSOP-VSO-WAVE
SOT360-1_118

环境信息

型号 可订购的器件编号 化学成分 RoHS RHF指示符
74LVC573APW-Q100 74LVC573APW-Q100J 74LVC573APW-Q100 rohs rhf rhf
品质及可靠性免责声明

文档 (12)

文件名称 标题 类型 日期
74LVC573A_Q100 Octal D-type transparent latch with 5 V tolerant inputs/outputs; 3-state Data sheet 2020-03-30
AN11009 Pin FMEA for LVC family Application note 2019-01-09
AN263 Power considerations when using CMOS and BiCMOS logic devices Application note 2023-02-07
SOT360-1 3D model for products with SOT360-1 package Design support 2020-01-22
lvc573a lvc573a IBIS model IBIS model 2013-04-07
Nexperia_package_poster Nexperia package poster Leaflet 2020-05-15
TSSOP20_SOT360-1_mk plastic, thin shrink small outline package; 20 leads; 0.65 mm pitch; 6.5 mm x 4.4 mm x 1.1 mm body Marcom graphics 2017-01-28
SOT360-1 plastic, thin shrink small outline package; 20 leads; 0.65 mm pitch; 6.5 mm x 4.4 mm x 1.1 mm body Package information 2022-06-21
SOT360-1_118 TSSOP20; Reel pack for SMD, 13''; Q1/T1 product orientation Packing information 2023-08-30
74LVC573APW-Q100_Nexperia_Product_Reliability 74LVC573APW-Q100 Nexperia Product Reliability Quality document 2023-05-29
lvc lvc Spice model SPICE model 2013-05-07
SSOP-TSSOP-VSO-WAVE Footprint for wave soldering Wave soldering 2009-10-08

支持

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模型

文件名称 标题 类型 日期
lvc573a lvc573a IBIS model IBIS model 2013-04-07
lvc lvc Spice model SPICE model 2013-05-07
SOT360-1 3D model for products with SOT360-1 package Design support 2020-01-22

PCB Symbol, Footprint and 3D Model

Model Name 描述

订购、定价与供货

型号 Orderable part number Ordering code (12NC) 状态 包装 Packing Quantity 在线购买
74LVC573APW-Q100 74LVC573APW-Q100J 935300238118 Active SOT360-1_118 2,500 订单产品

样品

安世半导体客户可通过我们的销售机构或直接通过在线样品商店订购样品: https://extranet.nexperia.com.

样品订单通常需要2-4天寄送时间。

如果您尚未取得安世半导体的直接采购帐号,我们的全球与区域经销网络可以协助您取得样品。

How does it work?

The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.

可订购部件

型号 可订购的器件编号 订购代码(12NC) 封装 从经销商处购买
74LVC573APW-Q100 74LVC573APW-Q100J 935300238118 SOT360-1 订单产品