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74LVC823ABQ-Q100

9-bit D-type flip-flop with 5 V tolerant inputs/outputs; positive edge-trigger; 3-state

The 74LVC823A-Q100 is a 9-bit D-type flip-flop with common clock (pin CP), clock enable (pin CE), master reset (pin MR) and 3-state outputs (pins Qn) for bus-oriented applications. The 9 flip-flops stores the state of their individual D-inputs that meet the set-up and hold times requirements on the LOW to HIGH CP transition, provided pin CE is LOW. When pin CE is HIGH, the flip-flops hold their data. A LOW on pin MR resets all flip-flops. When pin OE is LOW, the contents of the 9 flip-flops are available at the outputs. When pin OE is HIGH, the outputs go to the high-impedance OFF-state. Operation of the OE input does not affect the state of the flip-flops.

Inputs can be driven from either 3.3 V or 5 V devices. When disabled, up to 5.5 V can be applied to the outputs. These features allow the use of these devices as translators in mixed 3.3 V and 5 V applications.

This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.

可订购部件

型号 可订购的器件编号 订购代码(12NC) 封装 从经销商处购买

特性

  • Automotive product qualification in accordance with AEC-Q100 (Grade 1)
    • Specified from -40 °C to +85 °C and from -40 °C to +125 °C
  • 5 V tolerant inputs/outputs for interfacing with 5 V logic
  • Wide supply voltage range from 1.2 V to 3.6 V
  • CMOS low power consumption
  • Direct interface with TTL levels
  • Flow-through pinout architecture
  • 9-bit positive edge-triggered register
  • Independent register and 3-state buffer operation
  • Complies with JEDEC standard:
    • JESD8-7A (1.65 V to 1.95 V)
    • JESD8-5A (2.3 V to 2.7 V)
    • JESD8-C/JESD36 (2.7 V to 3.6 V)
  • ESD protection:
    • MIL-STD-883, method 3015 exceeds 2000 V
    • HBM JESD22-A114F exceeds 2000 V
    • MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω)
  • DHVQFN package with Side-Wettable Flanks enabling Automatic Optical Inspection (AOI) of solder joints

参数类型

型号Product statusVCC (V)Logic switching levelsOutput drive capability (mA)tpd (ns)fmax (MHz)Power dissipation considerationsTamb (°C)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package name
74LVC823ABQ-Q100End of life1.2 - 3.6CMOS/LVTTL± 245.4150low-40~125727.544DHVQFN24

PCB Symbol, Footprint and 3D Model

Model Name描述

系列

文档 (6)

文件名称标题类型日期
74LVC823A_Q1009-bit D-type flip-flop with 5 V tolerant inputs/outputs; positive edge-trigger; 3-stateData sheet2020-06-19
AN263Power considerations when using CMOS and BiCMOS logic devicesApplication note2023-02-07
AN11009Pin FMEA for LVC familyApplication note2019-01-09
lvc823alvc823a IBIS modelIBIS model2013-04-07
lvclvc Spice modelSPICE model2013-05-06
SOT815-1_118DHVQFN24; Reel pack for SMD, 13"; Q1/T1 product orientationPacking information2020-04-21

支持

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模型

文件名称标题类型日期
lvc823alvc823a IBIS modelIBIS model2013-04-07
lvclvc Spice modelSPICE model2013-05-06

PCB Symbol, Footprint and 3D Model

Model Name描述

How does it work?

The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.

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