74HC112-Q100; 74HCT112-Q100

Dual JK flip-flop with set and reset; negative-edge trigger

The 74HC112-Q100; 74HCT112-Q100 is a dual negative-edge triggered JK flip-flop. It features individual J and K inputs, clock (nCP) set (nSD) and reset (nRD) inputs. It also has complementary nQ and nQ outputs. The set and reset are asynchronous active LOW inputs and operate independently of the clock input. The J and K inputs control the state changes of the flip-flops as described in the mode select function table. The J and K inputs must be stable one set-up time prior to the HIGH-to-LOW clock transition for predictable operation. Inputs include clamp diodes that enable the use of current limiting resistors to interface inputs to voltages in excess of V_CC.

Schmitt-trigger action in the clock input makes the circuit highly tolerant to slower clock rise and fall times.

特性

Input levels:
- For 74HC112-Q100: CMOS level
- For 74HCT112-Q100: TTL level
Asynchronous set and reset
Specified in compliance with JEDEC standard no. 7A
ESD protection:
- HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
- CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
Specified from -40 °C to +85 °C and from -40 °C to +125 °C

参数类型

Type number	Product status	V_CC (V)	Logic switching levels	Output drive capability (mA)	t_pd (ns)	f_max (MHz)	Power dissipation considerations	T_amb (°C)	R_th(j-a) (K/W)	Ψ_th(j-top) (K/W)	R_th(j-c) (K/W)	Package name
74HC112PW-Q100	Production	2.0 - 6.0	CMOS	± 5.2	17	66	low	-40~125	109	1.0	36.7	TSSOP16
74HCT112D-Q100	Production	4.5 - 5.5	TTL	± 4	19	70	low	-40~125	75	1.7	33	SO16

封装

型号	封装	尺寸版本	回流焊/波峰焊	包装	状态	标示	可订购的器件编号，（订购码(12NC)）
74HC112PW-Q100	TSSOP16 (SOT403-1)	SOT403-1	SSOP-TSSOP-VSO-WAVE	SOT403-1_118	Active	HC112	74HC112PW-Q100J ( 9356 915 80118 )
74HCT112D-Q100	SO16 (SOT109-1)	SOT109-1	SO-SOJ-REFLOW SO-SOJ-WAVE	SOT109-1_118	Active	74HCT112D	74HCT112D-Q100J ( 9356 915 95118 )

环境信息

型号	可订购的器件编号	化学成分	RoHS	RHF指示符	无铅转换日期
74HC112PW-Q100	74HC112PW-Q100J	74HC112PW-Q100
74HCT112D-Q100	74HCT112D-Q100J	74HCT112D-Q100

品质及可靠性免责声明

文档 (7)

文件名称	标题	类型	日期
74HC_HCT112_Q100	Dual JK flip-flop with set and reset; negative-edge trigger	Data sheet	2024-01-15
SO-SOJ-WAVE	Footprint for wave soldering	Wave soldering	2009-10-08
SO-SOJ-REFLOW	Footprint for reflow soldering	Reflow soldering	2009-10-08
WAVE_BG-BD-1	Wave soldering profile	Wave soldering	2021-09-08
SOT109-1	plastic, small outline package; 16 leads; 1.27 mm pitch; 9.9 mm x 3.9 mm x 1.75 mm body	Package information	2023-11-07
SOT403-1	plastic, thin shrink small outline package; 16 leads; 5 mm x 4.4 mm x 1.2 mm body	Package information	2023-11-08
SSOP-TSSOP-VSO-WAVE	Footprint for wave soldering	Wave soldering	2009-10-08

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