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74ALVC00D-Q100

Quad 2-input NAND gate

The 74ALVC00-Q100 is a quad 2-input NAND gate.

Schmitt trigger action on all inputs makes the device tolerant of slow rise and fall times.

This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.

This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.

可订购部件

型号 可订购的器件编号 订购代码(12NC) 封装 从经销商处购买
74ALVC00D-Q100 74ALVC00D-Q100J 935300976118 SOT108-1 订单产品

特性

  • Automotive product qualification in accordance with AEC-Q100 (Grade 1)

    • Specified from -40 °C to +85 °C and from -40 °C to +125 °C

  • Wide supply voltage range from 1.65 V to 3.6 V

  • CMOS low power dissipation

  • Overvoltage tolerant inputs to 3.6 V

  • Direct interface with TTL levels

  • IOFF circuitry provides partial Power-down mode operation

  • Latch-up performance exceeds 250 mA per JESD78 Class II.A

  • Complies with JEDEC standards:

    • JESD8-7 (1.65 V to 1.95 V)

    • JESD8-5 (2.3 V to 2.7 V)

    • JESD8C/JESD36 (2.7 V to 3.6 V)

  • ESD protection:

    • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

  • Multiple package options

  • DHVQFN package with Side-Wettable Flanks enabling Automatic Optical Inspection (AOI) of solder joints

参数类型

型号Product statusVCC (V)Logic switching levelsOutput drive capability (mA)tpd (ns)fmax (MHz)Nr of bitsPower dissipation considerationsTamb (°C)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package name
74ALVC00D-Q100Production1.65 - 3.6TTL± 242.11454low-40~8510317.162SO14

PCB Symbol, Footprint and 3D Model

Model Name描述

Package

型号可订购的器件编号,(订购码(12NC))状态标示封装尺寸版本回流焊/波峰焊包装
74ALVC00D-Q10074ALVC00D-Q100J
( 9353 009 76118 )
Active74ALVC00D
SO14
(SOT108-1)
SOT108-1SO-SOJ-REFLOW
SO-SOJ-WAVE
SOT108-1_118

环境信息

型号可订购的器件编号化学成分RoHSRHF指示符
74ALVC00D-Q10074ALVC00D-Q100J74ALVC00D-Q100
品质及可靠性免责声明

文档 (7)

文件名称标题类型日期
74ALVC00_Q100Quad 2-input NAND gateData sheet2023-07-04
alvc00alvc00 IBIS modelIBIS model2013-04-07
74ALVC00D-Q100_Nexperia_Product_Reliability74ALVC00D-Q100 Nexperia Product ReliabilityQuality document2023-05-29
SO-SOJ-REFLOWFootprint for reflow solderingReflow soldering2009-10-08
SO-SOJ-WAVEFootprint for wave solderingWave soldering2009-10-08
SOT108-1_118SO14; Reel pack for SMD, 13"; Q1/T1 product orientationPacking information2021-01-20
WAVE_BG-BD-1Wave soldering profileWave soldering2021-09-08

支持

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模型

文件名称标题类型日期
alvc00alvc00 IBIS modelIBIS model2013-04-07

PCB Symbol, Footprint and 3D Model

Model Name描述

订购、定价与供货

型号Orderable part numberOrdering code (12NC)包装Packing quantity在线购买
74ALVC00D-Q10074ALVC00D-Q100J935300976118SOT108-1_118- 订单产品

样品

安世半导体客户可通过我们的销售机构或直接通过在线样品商店订购样品: https://extranet.nexperia.com.

样品订单通常需要2-4天寄送时间。

如果您尚未取得安世半导体的直接采购帐号,我们的全球与区域经销网络可以协助您取得样品。

How does it work?

The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.