双极性晶体管

二极管

ESD保护、TVS、滤波和信号调节ESD保护

MOSFET

氮化镓场效应晶体管(GaN FET)

绝缘栅双极晶体管(IGBTs)

模拟和逻辑IC

汽车应用认证产品(AEC-Q100/Q101)
SOT355-1

74HC4514-Q100

4-to-16 line decoder/demultiplexer with input latches

The 74HC4514-Q100 is a 4-to-16 line decoder/demultiplexer having four binary weighted address inputs (A0 to A3), with latches, a latch enable input (LE), an enable input (E) and 16 outputs (Q0 to Q15). When LE is HIGH, the selected output is determined by the data on An. When LE goes LOW, the last data present at An are stored in the latches and the outputs remain stable. When E is LOW, the selected output, determined by the contents of the latch, is HIGH. At E HIGH, all outputs are LOW. The enable input E does not affect the state of the latch. When the device is used as a demultiplexer, E is the data input and A0 to A3 are the address inputs. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.

This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.

Features and benefits

  • Automotive product qualification in accordance with AEC-Q100 (Grade 1)

    • Specified from -40 °C to +85 °C and from -40 °C to +125 °C

  • Wide supply voltage range from 2.0 V to 6.0 V

  • CMOS low power dissipation

  • High noise immunity

  • CMOS input levels

  • 16-line demultiplexing capability

  • Decodes 4 binary-coded inputs into 16 mutually-exclusive outputs

  • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B

  • Complies with JEDEC standards

    • JESD8C (2.7 V to 3.6 V)

    • JESD7A (2.0 V to 6.0 V)

  • ESD protection:

    • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

Applications

  • Digital multiplexing

  • Address decoding

  • Hexadecimal/BCD decoding

参数类型

型号 VCC (V) Logic switching levels Output drive capability (mA) tpd (ns) Power dissipation considerations Tamb (°C) Rth(j-a) (K/W) Ψth(j-top) (K/W) Rth(j-c) (K/W) Package name
74HC4514PW-Q100 2.0 - 6.0 CMOS ± 5.2 27 low -40~125 69 1 21 TSSOP24

封装

型号 可订购的器件编号，（订购码(12NC)） 状态 标示 封装 外形图 回流焊/波峰焊 包装
74HC4514PW-Q100 74HC4514PW-Q100J
(935691421118)		 Active HC4514 SOT355-1
TSSOP24
(SOT355-1) 		SOT355-1 SSOP-TSSOP-VSO-WAVE
SOT355-1_118

环境信息

型号 可订购的器件编号 化学成分 RoHS RHF指示符
74HC4514PW-Q100 74HC4514PW-Q100J 74HC4514PW-Q100 rohs rhf rhf
品质及可靠性免责声明

文档 (6)

文件名称 标题 类型 日期
74HC4514_Q100 4-to-16 line decoder/demultiplexer with input latches Data sheet 2024-08-05
AN90063 Questions about package outline drawings Application note 2025-06-13
SOT355-1 3D model for products with SOT355-1 package Design support 2020-01-22
Nexperia_package_poster Nexperia package poster Leaflet 2020-05-15
SOT355-1 plastic, thin shrink small outline package; 24 leads; 0.65 mm pitch; 7.8 mm x 4.4 mm x 1.2 mm body Package information 2024-11-15
SSOP-TSSOP-VSO-WAVE Footprint for wave soldering Wave soldering 2009-10-08

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模型

文件名称 标题 类型 日期
SOT355-1 3D model for products with SOT355-1 package Design support 2020-01-22

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