双极性晶体管

二极管

ESD保护、TVS、滤波和信号调节ESD保护

MOSFET

氮化镓场效应晶体管(GaN FET)

绝缘栅双极晶体管(IGBTs)

模拟和逻辑IC

汽车应用认证产品(AEC-Q100/Q101)

74HCS373

Octal D-type transparent latch with Schmitt-trigger inputs; 3-state

The 74HCS373 is an octal D-type transparent latch with 3-state outputs. The device features latch enable (LE) and output enable (OE) inputs. When LE is HIGH, data at the inputs enter the latches. In this condition the latches are transparent, a latch output will change each time its corresponding D-input changes. When LE is LOW the latches store the information that was present at the inputs a set-up time preceding the HIGH-to-LOW transition of LE. A HIGH on OE causes the outputs to assume a high-impedance OFF-state. Operation of the OE input does not affect the state of the latches. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.

All inputs are Schmitt-trigger inputs, capable of transforming slowly changing input signals into sharply defined, jitter-free output signals.

Features and benefits

  • Wide supply voltage range from 2.0 V to 6.0 V

  • Schmitt-trigger inputs

  • 3-state non-inverting outputs for bus oriented applications

  • Common 3-state output enable input

  • Low power consumption
    • Typical supply current (ICC) of 100 nA
    • Typical input leakage current (II) of ±10 nA
  • ±7.8 mA output drive at 6 V
  • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
  • Complies with JEDEC standards:
    • JESD7A (2.0 V to 6.0 V)

  • ESD protection:

    • HBM ANSI/ESDA/JEDEC JS-001 class 3A exceeds 4000 V

    • CDM ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1500 V

  • Multiple package options

  • Specified from -40 °C to +85 °C and from -40 °C to +125 °C

参数类型

型号 VCC (V) Logic switching levels Power dissipation considerations Tamb (°C) Package name
74HCS373BQ 2.0 - 6.0 CMOS low -40~125 DHVQFN20
74HCS373PW 2.0 - 6.0 CMOS low -40~125 TSSOP20

封装

型号 可订购的器件编号，（订购码(12NC)） 状态 标示 封装 外形图 回流焊/波峰焊 包装
74HCS373BQ 74HCS373BQX
(935692442115)		 Active S373 SOT764-1
DHVQFN20
(SOT764-1) 		SOT764-1 SOT764-1_115
74HCS373PW 74HCS373PWJ
(935692440118)		 Active S373 SOT360-1
TSSOP20
(SOT360-1) 		SOT360-1 SSOP-TSSOP-VSO-WAVE
SOT360-1_118

环境信息

型号 可订购的器件编号 化学成分 RoHS RHF指示符
74HCS373BQ 74HCS373BQX 74HCS373BQ rohs rhf rhf
74HCS373PW 74HCS373PWJ 74HCS373PW rohs rhf rhf
品质及可靠性免责声明

文档 (11)

文件名称 标题 类型 日期
74HCS373 Octal D-type transparent latch with Schmitt-trigger inputs; 3-state Data sheet 2025-10-24
AN90063 Questions about package outline drawings Application note 2025-10-22
SOT764-1 3D model for products with SOT764-1 package Design support 2019-10-03
SOT360-1 3D model for products with SOT360-1 package Design support 2020-01-22
74hcs373 74HCS373 IBIS model IBIS model 2025-10-26
Nexperia_package_poster Nexperia package poster Leaflet 2020-05-15
DHVQFN20_SOT764-1_mk plastic, dual in-line compatible thermal enhanced very thin quad flat package; 20 terminals; 0.5 mm pitch; 2.5 mm x 4.5 mm x 0.85 mm body Marcom graphics 2017-01-28
TSSOP20_SOT360-1_mk plastic, thin shrink small outline package; 20 leads; 0.65 mm pitch; 6.5 mm x 4.4 mm x 1.1 mm body Marcom graphics 2017-01-28
SOT764-1 plastic, leadless dual in-line compatible thermal enhanced very thin quad flat package; 20 terminals; 0.5 mm pitch; 4.5 mm x 2.5 mm x 1 mm body Package information 2022-06-21
SOT360-1 plastic, thin shrink small outline package; 20 leads; 0.65 mm pitch; 6.5 mm x 4.4 mm x 1.2 mm body Package information 2024-11-15
SSOP-TSSOP-VSO-WAVE Footprint for wave soldering Wave soldering 2009-10-08

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模型

文件名称 标题 类型 日期
SOT764-1 3D model for products with SOT764-1 package Design support 2019-10-03
SOT360-1 3D model for products with SOT360-1 package Design support 2020-01-22
74hcs373 74HCS373 IBIS model IBIS model 2025-10-26

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