74AUP2G17GW

Low-power dual Schmitt trigger

The 74AUP2G17 provides two Schmitt trigger buffers. It is capable of transforming slowly changing input signals into sharply defined, jitter-free output signals.

This device ensures a very low static and dynamic power consumption across the entire V_CC range from 0.8V to 3.6V.

This device is fully specified for partial power-down applications using I_OFF. The I_OFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.

The inputs switch at different points for positive and negative-going signals. The difference between the positive voltage V_T+ and the negative voltage V_T- is defined as the input hysteresis voltage V_H.

Low-power dual Schmitt trigger

从安世半导体购买

SKU	库存*	MOQ	单位价格**	数量

从经销商处购买

卖方	SKU	库存	MOQ		1	10	100	1,000	10,000	购买

卖方	SKU	库存	MOQ		1	10	100	1,000	10,000	购买

卖方	SKU	库存	MOQ		1	10	100	1,000	10,000	购买

卖方	SKU	库存	MOQ		1	10	100	1,000	10,000	购买

* 库存数量可能变化
** 显示的单位价格是基于小量订单
*** 授权经销商销售的库存过剩、到期和停产产品由经销商保证产品的可靠性，不再由安世半导体保证

特性

Wide supply voltage range from 0.8 V to 3.6 V
High noise immunity
ESD protection:
- HBM JESD22-A114F Class 3A exceeds 5000 V
- MM JESD22-A115-A exceeds 200 V
- CDM JESD22-C101E exceeds 1000 V
Low static power consumption; I_CC = 0.9 μA (maximum)
Latch-up performance exceeds 100 mA per JESD 78 Class II
Inputs accept voltages up to 3.6 V
Low noise overshoot and undershoot < 10 % of V_CC
I_OFF circuitry provides partial Power-down mode operation
Multiple package options
Specified from -40 °C to +85 °C and -40 °C to +125 °C

目标应用

参数类型

型号	Product status	V_CC (V)	Logic switching levels	Output drive capability (mA)	f_max (MHz)	No of bits	Power dissipation considerations	R_th(j-a) (K/W)	R_th(j-c) (K/W)	Package name
74AUP2G17GW	Production	0.8 - 3.6	CMOS	± 1.9	70	2	ultra low	264	153	TSSOP6

Package

型号	可订购的器件编号，（订购码(12NC)）	状态	标示	封装	尺寸版本	回流焊/波峰焊	包装
74AUP2G17GW	74AUP2G17GW,125 ( 9352 799 91125 )	Active	pV	TSSOP6 (SOT363)	SOT363		Reel 7" Q3/T4, Reverse

品质、可靠性及化学成分

型号	可订购的器件编号	化学成分	RoHS / RHF	MSL	MSL无铅
74AUP2G17GW	74AUP2G17GW,125	74AUP2G17GW		1	1

品质及可靠性免责声明

系列

文档 (5)

文件名称	标题	类型	日期
74AUP2G17	Low-power dual Schmitt trigger	Data sheet	2017-11-29
AN10161	PicoGate Logic footprints	Application note	2002-10-29
AN11052	Pin FMEA for AUP family	Application note	2019-01-09
aup2g17	aup2g17 IBIS model	IBIS model	2014-12-21
Nexperia_document_leaflet_Logic_AUP_technology_portfolio_201904	Nexperia_document_leaflet_Logic_AUP_technology_portfolio_201904	Leaflet	2019-04-12

支持

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模型

文件名称	标题	类型	日期
aup2g17	aup2g17 IBIS model	IBIS model	2014-12-21

订购、定价与供货

型号	Orderable part number	Ordering code (12NC)	包装	在线购买
74AUP2G17GW	74AUP2G17GW,125	935279991125	Reel 7" Q3/T4, Reverse	订单产品

样品

安世半导体客户可通过我们的销售机构或直接通过在线样品商店订购样品： https://extranet.nexperia.com.

样品订单通常需要2-4天寄送时间。

如果您尚未取得安世半导体的直接采购帐号，我们的全球与区域经销网络可以协助您取得样品。