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74ALVCH16600

18-bit universal bus transceiver; 3-state

The 74ALVCH16600 is an 18-bit universal transceiver featuring non-inverting 3-state bus compatible outputs in both send and receive directions. Data flow in each direction is controlled by output enable (OEAB and OEBA), latch enable (LEAB and LEBA), and clock (CPAB and CPBA) inputs. For A-to-B data flow, the device operates in the transparent mode when LEAB is HIGH. When LEAB is LOW, the A data is latched if CPAB is held at a HIGH or LOW logic level. If LEAB is LOW, the A-bus data is stored in the flip-flop on the HIGH-to-LOW transition of CPAB. When OEAB is LOW, the outputs are active. When OEAB is HIGH, the outputs are in the high-impedance state. The HIGH clock can be controlled with the clock-enable inputs (CEBA and CEAB).

Data flow for B-to-A is similar to that of A-to-B, but uses OEBA, LEBA and CPBA.

To ensure the high impedance state during power up or power down, OEBA and OEAB should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking/current-sourcing capability of the driver.

Active bus hold circuitry is provided to hold unused or floating data inputs at a valid logic level.

特性

  • CMOS low power consumption

  • MultiByte flow-through standard pin-out architecture

  • Low inductance multiple VCC and GND pins for minimum noise and ground bounce

  • Direct interface with TTL levels (2.7 V to 3.6 V)

  • Bus hold on data inputs

  • Output drive capability 50 Ω transmission lines at 85 °C

  • Current drive ±24 mA at 3.0 V

  • Complies with JEDEC standards:

    • JESD8-5 (2.3 V to 2.7 V)

    • JESD8B/JESD36 (2.7 V to 3.6 V)

  • ESD protection:

    • HBM ANSI/ESDA/JEDEC JS-001 exceeds 2000 V

    • CDM JESD22-C101E exceeds 1000 V

参数类型

Type numberProduct statusVCC(A) (V)VCC(B) (V)Logic switching levelsOutput drive capability (mA)tpd (ns)Nr of bitsfmax (MHz)Power dissipation considerationsTamb (°C)Rth(j-a) (K/W)Package name
74ALVCH16600DGGProductionn.a.n.a.TTL± 242.818150low-40~8593TSSOP56

封装

型号封装尺寸版本回流焊/波峰焊包装状态标示可订购的器件编号，（订购码(12NC)）
74ALVCH16600DGG
TSSOP56
(SOT364-1) 		SOT364-1SSOP-TSSOP-VSO-WAVE
SOT364-1_118ActiveALVCH1660074ALVCH16600DGG:11
( 9352 625 45118 )

下表中的版本已停产。参见表 停产信息 了解更多信息。

型号封装尺寸版本回流焊/波峰焊包装状态标示可订购的器件编号，（订购码(12NC)）
74ALVCH16600DGG
TSSOP56
(SOT364-1) 		SOT364-1SSOP-TSSOP-VSO-WAVE
SOT364-1_518Discontinued / End-of-lifeALVCH1660074ALVCH16600DGGY
( 9352 625 45518 )

停产信息

型号可订购的器件编号，（订购码(12NC)）最后一次购买日期最后一次交货日期替代产品状态备注
74ALVCH16600DGG935262545518
74ALVCH16600DGG9352625455122021-12-312022-06-3074ALVCH16600DGG
    74ALVCH16600DGG935262545112

    环境信息

    型号可订购的器件编号化学成分RoHSRHF指示符无铅转换日期
    74ALVCH16600DGG74ALVCH16600DGG:1174ALVCH16600DGGweek 2, 2006

    下表中的版本已停产。参见表 停产信息 了解更多信息。

    型号可订购的器件编号化学成分RoHSRHF指示符无铅转换日期
    74ALVCH16600DGG74ALVCH16600DGGY74ALVCH16600DGGAlways Pb-free
    品质及可靠性免责声明

    文档 (5)

    文件名称标题类型日期
    74ALVCH1660018-bit universal bus transceiver; 3-stateData sheet2018-01-15
    alvch16600alvch16600 IBIS modelIBIS model2013-04-07
    Nexperia_Selection_guide_2023Nexperia Selection Guide 2023Selection guide2023-05-10
    SSOP-TSSOP-VSO-WAVEFootprint for wave solderingWave soldering2009-10-08
    SOT364-1plastic, thin shrink small outline package; 56 leads; 0.5 mm pitch; 14 mm x 6.1 mm x 1.2 mm bodyPackage information2022-06-23

    支持

    如果您需要设计/技术支持，请告知我们并填写 应答表, 我们会尽快回复您。

    模型

    文件名称标题类型日期
    alvch16600alvch16600 IBIS modelIBIS model2013-04-07

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