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74HC161PW

Presettable synchronous 4-bit binary counter; asynchronous reset

The 74HC161 is a synchronous presettable binary counter with an internal look-head carry. Synchronous operation is provided by having all flip-flops clocked simultaneously on the positive-going edge of the clock (CP). The outputs (Q0 to Q3) of the counters may be preset HIGH or LOW. A LOW at the parallel enable input (PE) disables the counting action and causes the data at the data inputs (D0 to D3) to be loaded into the counter on the positive-going edge of the clock. Preset takes place regardless of the levels at count enable inputs (CEP and CET). A LOW at the master reset input (MR) sets Q0 to Q3 LOW regardless of the levels at input pins CP, PE, CET and CEP (thus providing an asynchronous clear function). The look-ahead carry simplifies serial cascading of the counters. Both CEP and CET must be HIGH to count. The CET input is fed forward to enable the terminal count output (TC). The TC output thus enabled will produce a HIGH output pulse of a duration approximately equal to a HIGH output of Q0. This pulse can be used to enable the next cascaded stage. The maximum clock frequency for the cascaded counters is determined by the CP to TC propagation delay and CEP to CP set-up time, according to the following formula:

Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.

可订购部件

型号 可订购的器件编号 订购代码(12NC) 封装 从经销商处购买
74HC161PW 74HC161PW,118 935188320118 SOT403-1 订单产品

特性

  • Wide supply voltage range from 2.0 V to 6.0 V

  • CMOS low power dissipation

  • High noise immunity

  • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B

  • Complies with JEDEC standards:

    • JESD8C (2.7 V to 3.6 V)
    • JESD7A (2.0 V to 6.0 V)
  • CMOS input levels

  • Synchronous counting and loading

  • 2 count enable inputs for n-bit cascading

  • Asynchronous reset

  • Positive-edge triggered clock

  • ESD protection:

    • HBM JESD22-A114F exceeds 2000 V

    • MM JESD22-A115-A exceeds 200 V

  • Specified from -40 °C to +85 °C and -40 °C to +125 °C

参数类型

型号Product statusVCC (V)Output drive capability (mA)Logic switching levelstpd (ns)Power dissipation considerationsTamb (°C)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package name
74HC161PWProduction2.0 - 6.0± 5.2CMOS19low-40~1251162.544.8TSSOP16

PCB Symbol, Footprint and 3D Model

Model Name描述

Package

型号可订购的器件编号,(订购码(12NC))状态标示封装尺寸版本回流焊/波峰焊包装
74HC161PW74HC161PW,118
( 9351 883 20118 )
ActiveHC161
TSSOP16
(SOT403-1)
SOT403-1SSOP-TSSOP-VSO-WAVE
SOT403-1_118

环境信息

型号可订购的器件编号化学成分RoHSRHF指示符
74HC161PW74HC161PW,11874HC161PW
品质及可靠性免责声明

文档 (7)

文件名称标题类型日期
74HC161Presettable synchronous 4-bit binary counter; asynchronous resetData sheet2021-03-16
AN11044Pin FMEA 74HC/74HCT familyApplication note2019-01-09
74HC161PW_Nexperia_Product_Reliability74HC161PW Nexperia Product ReliabilityQuality document2023-05-29
hcHC/HCT Spice modelSPICE model2022-02-17
HCT_USER_GUIDEHC/T User GuideUser manual1997-10-31
SSOP-TSSOP-VSO-WAVEFootprint for wave solderingWave soldering2009-10-08
SOT403-1_118TSSOP16; Reel pack for SMD, 13"; Q1/T1 product orientationPacking information2020-02-14

支持

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模型

文件名称标题类型日期
hcHC/HCT Spice modelSPICE model2022-02-17

PCB Symbol, Footprint and 3D Model

Model Name描述

订购、定价与供货

型号Orderable part numberOrdering code (12NC)包装Packing quantity在线购买
74HC161PW74HC161PW,118935188320118SOT403-1_118- 订单产品

样品

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样品订单通常需要2-4天寄送时间。

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How does it work?

The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.