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74AVC1T8128

Single dual-supply translating 2-input NOR with enable

The 74AVC1T8128 is a single dual-supply translating 2-input NOR with enable input. It features two data input pins (A, B), one enable input pin (E), one data output pin (Y) and dual-supply pins (VCC(A) and VCC(B)). Both VCC(A) and VCC(B) can be supplied at any voltage between 0.8 V and 3.6 V making the device suitable for translating between any of the low voltage nodes (0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V and 3.3 V). Pins A, B and E are referenced to VCC(A) and pin Y is referenced to VCC(B).

The logic equation provided at the Y output is:

Y = E + A• B

The device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing any damaging backflow current through the device when it is powered down. In Suspend mode when either VCC(A) or VCC(B) are at GND level, the Y output is in the high-impedance OFF-state.

特性

  • Wide supply voltage range:

    • VCC(A): 0.8 V to 3.6 V

    • VCC(B): 0.8 V to 3.6 V

  • High noise immunity

  • Complies with JEDEC standards:

    • JESD8-12 (0.8 V to 1.3 V)

    • JESD8-11 (0.9 V to 1.65 V)

    • JESD8-7 (1.2 V to 1.95 V)

    • JESD8-5 (1.8 V to 2.7 V)

    • JESD8-B (2.7 V to 3.6 V)

  • ESD protection:

    • HBM: ANSI/ESDA/Jedec JS-001 exceeds 8000 V

    • CDM: ANSI/ESDA/Jedec JS-002 exceeds 1000 V

  • Maximum data rates:

    • 500 Mbit/s (1.8 V to 3.3 V translation)

    • 320 Mbit/s (<1.8 V to 3.3 V translation)

    • 320 Mbit/s (translate to 2.5 V or 1.8 V)

    • 280 Mbit/s (translate to 1.5 V)

    • 240 Mbit/s (translate to 1.2 V)

  • Suspend mode

  • Latch-up performance exceeds 100 mA per JESD 78 Class II

  • Inputs accept voltages up to 3.6 V

  • Low noise overshoot and undershoot < 10 % of VCC

  • IOFF circuitry provides partial Power-down mode operation

  • Specified from -40 °C to +85 °C and -40 °C to +125 °C

参数类型

Type numberProduct statusVCC (V)Logic switching levelsOutput drive capability (mA)tpd (ns)Nr of bitsPower dissipation considerationsTamb (°C)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package name
74AVC1T8128GSProductionn.a.CMOS/LVTTL± 122.41very low-40~12528011.5149XSON8

封装

型号封装尺寸版本回流焊/波峰焊包装状态标示可订购的器件编号，（订购码(12NC)）
74AVC1T8128GS
XSON8
(SOT1203) 		SOT1203REFLOW_BG-BD-1
SOT1203_115ActiveBe74AVC1T8128GSX
( 9356 906 95115 )

环境信息

型号可订购的器件编号化学成分RoHSRHF指示符无铅转换日期
74AVC1T8128GS74AVC1T8128GSX74AVC1T8128GSweek 25, 2019
品质及可靠性免责声明

文档 (7)

文件名称标题类型日期
74AVC1T8128Single dual-supply translating 2-input NOR with enableData sheet2018-10-12
AN90007Pin FMEA for AVC familyApplication note2018-11-30
avc1t812874AVC1T8128 IBIS modelIBIS model2018-10-03
Nexperia_Selection_guide_2023Nexperia Selection Guide 2023Selection guide2023-05-10
MAR_SOT1203MAR_SOT1203 TopmarkTop marking2013-06-03
SOT1203plastic, leadless extremely thin small outline package; 8 terminals; 0.35 mm pitch; 1.35 mm x 1 mm x 0.35 mm bodyPackage information2022-06-03
REFLOW_BG-BD-1Reflow soldering profileReflow soldering2021-04-06

支持

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模型

文件名称标题类型日期
avc1t812874AVC1T8128 IBIS modelIBIS model2018-10-03

订购、定价与供货

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