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74LVC1G123DC ECAD models PCB Symbol, Footprint & ECAD Model

Single retriggerable monostable multivibrator; Schmitt trigger inputs

The 74LVC1G123 is a single retriggerable monostable multivibrator with Schmitt trigger inputs. Output pulse width is controlled by three methods:

  1. The basic pulse is programmed by selection of an external resistor (REXT) and capacitor (CEXT).
  2. Once triggered, the basic output pulse width may be extended by retriggering the gated active LOW-going edge input (A) or the active HIGH-going edge input (B). By repeating this process, the output pulse period (Q = HIGH) can be made as long as desired. Alternatively an output delay can be terminated at any time by a LOW-going edge on input CLR, which also inhibits the triggering.
  3. An internal connection from CLR to the input gates makes it possible to trigger the circuit by a HIGH-going signal at input CLR.

Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 V and 5 V environment. Schmitt-trigger inputs, makes the circuit highly tolerant to slower input rise and fall times.

This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.

可订购部件

型号 可订购的器件编号 订购代码(12NC) 封装 从经销商处购买
74LVC1G123DC 74LVC1G123DC,125 935295665125 SOT765-1 订单产品

特性

  • Wide supply voltage range from 1.65 V to 5.5 V
  • High noise immunity
  • ±24 mA output drive (VCC = 3.0 V)
  • CMOS low power consumption
  • DC triggered from active HIGH or active LOW inputs
  • Retriggerable for very long pulses up to 100 % duty factor
  • Direct reset terminates output pulse
  • Schmitt trigger on all inputs
  • Complies with JEDEC standard:
    • JESD8-7 (1.65 V to 1.95 V)
    • JESD8-5 (2.3 V to 2.7 V)
    • JESD8-B/JESD36 (2.7 V to 3.6 V)
  • Power-on-reset on outputs
  • Latch-up performance exceeds 100 mA
  • Direct interface with TTL levels
  • Inputs accept voltages up to 5.5 V
  • ESD protection:
    • HBM JESD22-A114F exceeds 2000 V
    • MM JESD22-A115-A exceeds 200 V
    • CDM JESD22-C101E exceeds 1000 V
  • Multiple package options
  • Specified from -40 °C to +85 °C and -40 °C to +125 °C

目标应用

参数类型

型号Product statusVCC (V)Logic switching levelsOutput drive capability (mA)tpd (ns)Power dissipation considerationsTamb (°C)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package name
74LVC1G123DCProduction1.65 - 5.5CMOS/LVTTL± 323.5low-40~12520334.0113VSSOP8

Package

型号可订购的器件编号,(订购码(12NC))状态标示封装尺寸版本回流焊/波峰焊包装
74LVC1G123DC74LVC1G123DC,125
( 9352 956 65125 )
ActiveY3
VSSOP8
(SOT765-1)
SOT765-1Reel 7" Q3/T4, Reverse

品质、可靠性及化学成分

型号可订购的器件编号化学成分RoHS / RHFEFRIFRMTBF(小时)MSLMSL无铅
74LVC1G123DC74LVC1G123DC,12574LVC1G123DC123.83.872.58E811
品质及可靠性免责声明

文档 (6)

文件名称标题类型日期
74LVC1G123Single retriggerable monostable multivibrator; Schmitt trigger inputsData sheet2018-11-02
AN10343MicroPak soldering informationApplication note2010-12-30
AN11009Pin FMEA for LVC familyApplication note2019-01-09
lvc1g12374LVC1G123 IBIS modelIBIS model2015-04-02
SOT765-1_125VSSOP8; Reel pack for SMD, 7''; Q3/T4 product orientationPacking2020-01-13
SOT765-1plastic, very thin shrink small outline package; 8 leads; 0.5 mm pitch; 2 mm x 2.3 mm x 1 mm bodyOutline drawing2018-11-14

支持

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模型

文件名称标题类型日期
lvc1g12374LVC1G123 IBIS modelIBIS model2015-04-02

订购、定价与供货

型号Orderable part numberOrdering code (12NC)包装在线购买
74LVC1G123DC74LVC1G123DC,125935295665125Reel 7" Q3/T4, Reverse订单产品

样品

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