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74LVC4T3144-Q100

4-bit dual supply buffer/line driver; 3-state

The 74LVC4T3144-Q100 is a 4-bit, dual-supply level translating buffer with 3-state outputs. It features four data inputs (An and B4), four data outputs (YBn and YA4), and an output enable input (OE). The device is configured to translate three inputs from VCC(A) to VCC(B) and one input from VCC(B) to VCC(A). OE, An and YA4 are referenced to VCC(A) and YBn and B4 are referenced to VCC(B). A HIGH on OE causes the outputs to assume a high-impedance OFF-state.

The device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables outputs, preventing any damaging backflow current through the device when it is powered down. In suspend mode when either VCC(A) or VCC(B) are at GND level, all outputs are in the high-impedance OFF-state.

This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.

特性

  • Automotive product qualification in accordance with AEC-Q100 (Grade 1)

    • Specified from -40 °C to +85 °C and from -40 °C to +125 °C

  • Wide supply voltage range:

    • VCC(A): 1.2 V to 5.5 V

    • VCC(B): 1.2 V to 5.5 V

  • High noise immunity

  • Maximum data rates:

    • 200 Mbps (3.3 V to 5.0 V translation)

    • 140 Mbps (translate to 3.3 V))

    • 100 Mbps (translate to 2.5 V)

    • 75 Mbps (translate to 1.8 V)

    • 60 Mbps (translate to 1.5 V)

  • Suspend mode

  • Latch-up performance exceeds 100 mA per JESD 78B Class II

  • ±24 mA output drive (VCC = 3.0 V)

  • Inputs accept voltages up to 5.5 V

  • Low power consumption: 30 μA maximum ICC

  • IOFF circuitry provides partial Power-down mode operation

  • Complies with JEDEC standards:

    • JESD8-11A (1.4 V to 1.6 V)

    • JESD8-7 (1.65 V to 1.95 V)

    • JESD8-5 (2.3 V to 2.7 V)

    • JESD8C (3.0 V to 3.6 V)

    • JESD12-6 (4.5 V to 5.5 V)

  • ESD protection:

    • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

参数类型

Type numberProduct statusVCC(A) (V)VCC(B) (V)Logic switching levelsOutput drive capability (mA)tpd (ns)Nr of bitsPower dissipation considerationsTamb (°C)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package name
74LVC4T3144PW-Q100Production1.2 - 5.51.2 - 5.5CMOS± 813.21low-40~12531685.8186TSSOP14

封装

型号封装尺寸版本回流焊/波峰焊包装状态标示可订购的器件编号,(订购码(12NC))
74LVC4T3144PW-Q100
TSSOP14
(SOT402-1)
SOT402-1SSOP-TSSOP-VSO-WAVE
SOT402-1_118ActiveC4T314474LVC4T3144PW-Q10J
( 9356 901 73118 )

环境信息

型号可订购的器件编号化学成分RoHSRHF指示符无铅转换日期
74LVC4T3144PW-Q10074LVC4T3144PW-Q10J74LVC4T3144PW-Q100week 25, 2019
品质及可靠性免责声明

文档 (5)

文件名称标题类型日期
74LVC4T3144_Q1004-bit dual supply buffer/line driver; 3-stateData sheet2024-02-22
lvc4t314474LVC4T3144 IBIS modelIBIS model2017-08-16
Nexperia_Selection_guide_2023Nexperia Selection Guide 2023Selection guide2023-05-10
SSOP-TSSOP-VSO-WAVEFootprint for wave solderingWave soldering2009-10-08
SOT402-1plastic, thin shrink small outline package; 14 leads; 0.65 mm pitch; 5 mm x 4.4 mm x 1.2 mm bodyPackage information2023-11-07

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模型

文件名称标题类型日期
lvc4t314474LVC4T3144 IBIS modelIBIS model2017-08-16

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