Dual supply translating buffer

The AXP1T34 is a single bit, dual supply translating buffer. It features one input (A), an output (Y) and dual supply pins (VCCI and VCCO). Both VCCI and VCCO can be supplied at any voltage between 0.9 V and 5.5 V making the device suitable for translating between any voltage nodes specified (1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V and 5.0 V). No power supply sequencing is required and output glitches during power supply transitions are prevented using patented circuitry. As a result, glitches will not appear on the outputs for supply transitions during power-up/down between 20 mV/μs and 5.5 V/s

The input is referenced to VCCI and the output is referenced to VCCO. Schmitt-trigger action at the input makes the circuit tolerant of slower input rise and fall times.

This device ensures low static and dynamic power consumption across the entire supply range and is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. In suspend mode when either VCCI or VCCO are at GND level the output is in the high-impedance OFF-state

Features and benefits

  • Wide supply voltage range:

    • VCCI: 0.9 V to 5.5 V

    • VCCO: 0.9 V to 5.5 V

  • Low input capacitance; CI = 1.5 pF (typical)

  • Low output capacitance; CO = 3.8 pF (typical)

  • Low dynamic power consumption; CPD = 0.4 pF at VCCI = 1.2 V (typical)

  • Low dynamic power consumption; CPD = 11 pF at VCCO = 5 V (typical)

  • Low static power consumption; ICCI = 0.1 µA (25 °C maximum)

  • Low static power consumption; ICCO = 1.0 µA (25 °C maximum)

  • High noise immunity

  • Complies with JEDEC standard:

    • JESD8-12 (1.1 V to 1.3 V; A input)

    • JESD8-11 (1.4 V to 1.6 V)

    • JESD8-7 (1.65 V to 1.95 V)

    • JESD8-5 (2.3 V to 2.7 V)

    • JESD8C (2.7 V to 3.6 V)

    • JESD12-6 (4.5 V to 5.5 V)

  • ESD protection:

    • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

  • Latch-up performance exceeds 100 mA per JESD78D Class II

  • Inputs accept voltages up to 5.5 V

  • Low noise overshoot and undershoot < 10% of VCCO

  • IOFF circuitry provides partial power-down mode operation

  • Multiple package options

  • Specified from −40 °C to +125 °C


型号 Product status Package name
AXP1T34GS Production XSON6


型号 可订购的器件编号,(订购码(12NC)) 状态 标示 封装 外形图 回流焊/波峰焊 包装
Active r3 SOT1202
Not available


型号 可订购的器件编号 化学成分 RoHS RHF指示符
AXP1T34GS AXP1T34GSH AXP1T34GS rohs rhf rhf


文档 (7)

文件名称 标题 类型 日期
AXP1T34 Dual supply translating buffer Data sheet 2023-12-01
Nexperia_document_guide_MiniLogic_MicroPak_201808 MicroPak leadless logic portfolio guide Brochure 2018-09-03
SOT1202 3D model for products with SOT1202 package Design support 2023-02-02
Nexperia_package_poster Nexperia package poster Leaflet 2020-05-15
SOT1202 plastic, leadless extremely thin small outline package; 6 terminals; 0.35 mm pitch; 1 mm x 1mm x 0.35 mm body Package information 2022-06-01
REFLOW_BG-BD-1 Reflow soldering profile Reflow soldering 2021-04-06
MAR_SOT1202 MAR_SOT1202 Topmark Top marking 2013-06-03


如果您需要设计/技术支持,请告知我们并填写 应答表 我们会尽快回复您。


文件名称 标题 类型 日期
SOT1202 3D model for products with SOT1202 package Design support 2023-02-02


型号 Orderable part number Ordering code (12NC) 状态 包装 Packing Quantity 在线购买
AXP1T34GS AXP1T34GSH 935691626125 Active SOT1202_125 5,000 订单产品


安世半导体客户可通过我们的销售机构或直接通过在线样品商店订购样品: https://extranet.nexperia.com.



How does it work?

The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.


型号 可订购的器件编号 订购代码(12NC) 封装 从经销商处购买
AXP1T34GS AXP1T34GSH 935691626125 SOT1202 订单产品