74AHC157PW-Q100

Quad 2-input multiplexer

The 74AHC157-Q100; 74AHCT157-Q100 is a high-speed Si-gate CMOS device and is pin compatible with Low-Power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard no. 7A.

The 74AHC157-Q100; 74AHCT157-Q100 is a quad 2-input multiplexer which selects 4 bits of data from two sources under the control of a common data select input (S). The enable input (E) is active LOW. When E is HIGH, all of the outputs (1Y to 4Y) are forced LOW regardless of all other input conditions. Moving the data from two groups of registers to four common output buses is a common use of the 74AHC157-Q100; 74AHCT157-Q100. The state of the common data select input (S) determines the particular register from which the data comes. It can also be used as function generator. The device is useful for implementing highly irregular logic by generating any four of the 16 different functions of two variables with one variable common. The 74AHC157-Q100; 74AHCT157-Q100 is logic implementation of a 4-pole, 2-position switch. The logic levels applied to S, determines the position of the switch.

The logic equations are:

1Y = E (1I1 x S + 1I0 x S)

2Y = E (2I1 x S + 2I0 x S)

3Y = E (3I1 x S + 3I0 x S)

4Y = E (4I1 x S + 4I0 x S)

This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.

特性

  • Automotive product qualification in accordance with AEC-Q100 (Grade 1)
    • Specified from -40 °C to +85 °C and from -40 °C to +125 °C
  • Balanced propagation delays
  • All inputs have a Schmitt-trigger action
  • Inputs accept voltages higher than VCC
  • Multiple input enable for easy expansion
  • Ideal for memory chip select decoding
  • Input levels:
    • For 74AHC157-Q100: CMOS level
    • For 74AHCT157-Q100: TTL level
  • ESD protection:
    • MIL-STD-883, method 3015 exceeds 2000 V
    • HBM JESD22-A114F exceeds 2000 V
    • MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω)
  • Multiple package options

目标应用

参数类型

型号Product statusVCC (V)Logic switching levelsOutput drive capability (mA)tpd (ns)Power dissipation considerationsTamb (Cel)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package name
74AHC157PW-Q100Production2.0 - 5.5CMOS+/- 83.2low-40~1251244.253TSSOP16

Package

型号封装尺寸版本回流焊/波峰焊包装状态标示可订购的器件编号,(订购码(12NC))
74AHC157PW-Q100
TSSOP16
(SOT403-1)
SOT403-1SSOP-TSSOP-VSO-WAVE
Reel 13" Q1/T1ActiveAHC15774AHC157PW-Q100J
( 9353 006 84118 )

品质、可靠性及化学成分

型号可订购的器件编号化学成分RoHS / RHF无铅转换日期EFRMSLMSL无铅
74AHC157PW-Q10074AHC157PW-Q100J74AHC157PW-Q100Always Pb-free84.911
品质及可靠性免责声明

文档 (10)

文件名称标题类型日期
74AHC_AHCT157_Q100Quad 2-input multiplexerData sheet2017-05-03
AN11106Pin FMEA for AHC/AHCT familyApplication note2011-11-04
AN223Ground and VCC Bounce of High-Speed Integrated CircuitsApplication note2013-03-13
AN252Live Insertion Aspects of Philips Logic FamiliesApplication note2013-03-13
AN212Package lead inductance considerations in high-speed applicationsApplication note2013-03-13
AN10156Sorting through the low voltage logic mazeApplication note2013-03-13
ahc157ahc157 IBIS modelIBIS model2013-04-07
SSOP-TSSOP-VSO-WAVEFootprint for wave solderingWave soldering2009-10-08
SOT403-1_118TSSOP16; Reel pack; SMD, 13" Q1/T1 Standard product orientation Orderable part number ending ,118 or J Ordering code (12NC) ending 118Packing2013-04-08
SOT403-1plastic, thin shrink small outline package; 16 leads; 5 mm x 4.4 mm x 1.1 mm bodyOutline drawing2018-02-23

支持

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模型

文件名称标题类型日期
ahc157ahc157 IBIS modelIBIS model2013-04-07

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